Chapter 2 Q-SIG FEATURES
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SYSTEM CONFIGURATION
PLO
The Phase Locked Oscillator (PLO) equipped on the CPU blade is responsible to synchronize the system
with Q-SIG clocks.
The PLO generates the clock signals according to the source clocks received from network. The source
clock signals are extracted at PRT blades and supplied to the PLO. Two clock routes are available: one is
the route 0 to receive clock signals from PRT0, and the other is a standby route 1 (PRT1) to receive clock
signals when no clock signals appear on the route 0. When no clock signals come from either route 0 or
route 1, the PLO keeps generating the clock signals at the frequency of the last source clock. The PLO can
receive different frequency of source clocks from the route 0 and route 1.
The figure below shows an example of clock supply route.
Clock Supply Route
PBX
TDSW
PRT1
PLO
NETWORK
PRT0
: CLOCK SIGNAL SUPPLY ROUTE 0
: CLOCK SIGNAL SUPPLY ROUTE 1
Q-SIG