CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
Preliminary User’s Manual U16315EJ1V0UD
137
(4) Prescaler mode register 00 (PRM00)
This register is used to set the 16-bit timer counter 00 (TM00) count clock and TI000 and TI010 input valid edges.
PRM00 can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears PRM00 to 00H.
Figure 6-5. Format of Prescaler Mode Register 00 (PRM00)
Address: FFBBH After reset: 00H R/W
Symbol
7
6
5
4
3
2
1
0
PRM00
ES101
ES100
ES001
ES000
0
0
PRM001
PRM000
ES101
ES100
TI010 valid edge selection
0
0
Falling edge
0
1
Rising edge
1
0
Setting prohibited
1
1
Both falling and rising edges
ES001
ES000
TI000 valid edge selection
0
0
Falling edge
0
1
Rising edge
1
0
Setting prohibited
1
1
Both falling and rising edges
PRM001
PRM000
Count clock selection
0
0
f
X
(10 MHz)
0
1
f
X
/2
2
(2.5 MHz)
1
0
f
X
/2
8
(39.06 kHz)
1
1
TI000 valid edge
Note
Note
The external clock requires a pulse two times longer than internal clock (f
X
).
Cautions 1. If the valid edge of TI000 is to be set for the count clock, do not set the clear & start mode
using the valid edge of TI000 and the capture trigger.
2. Always set data to PRM00 after stopping the timer operation.
3. If the TI000 or TI010 pin is high level immediately after system reset, the rising edge is
immediately detected after the rising edge or both the rising and falling edges are set as the
valid edge(s) of the TI000 pin or TI010 pin to enable the operation of 16-bit timer counter 00
(TM00). Care is therefore required when pulling up the TI000 or TI010 pin. However, when re-
enabling operation after the operation has been stopped once, the rising edge is not
detected.
4. When P01 is used as the TI010 valid edge, it cannot be used as the timer output (TO00), and
when used as TO00, it cannot be used as the TI010 valid edge.
Remarks 1
. f
X
: X1 input clock oscillation frequency
2.
TI000, TI010: 16-bit timer/event counter 00 input pin
3.
Figures in parentheses are for operation with f
X
= 10 MHz.
Содержание 78K0/KD1 Series
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