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Basic Test Procedure

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Table 1. Default ADS42Bxx EVM Revision A Jumper Setting for Serial Interface (continued)

Jumper

Default position

Function

JP14

Short 7 - 8

ADC 2’s complement, DDR LVDS

JP5

Short 1 - 2

ADC CTRL3, normal operation

JP6

Short 1 - 2

ADC CTRL2, normal operation

JP7

Short 1 - 2

ADC CTRL1, normal operation

JP 18

Short 1 - 2

Ext Buffer

JP 23

Short 1 - 2

Ext Buffer

JP 24

Short 1 - 2

Ext Buffer

JP 25

Short 1 - 2

Ext Buffer

JP30

Short

ADC buffer 3.3-V supply

Table 2. Parallel Interface with Pin Control of ADS58C28 and ADS42Bxx EVM Revision B Jumper

Setting

Jumper

Position

Function

JP8

Short 1 - 2

ADC SCLK for parallel control

JP9

Short 1 - 2

ADC SDATA for parallel control

JP10

Short 1 - 2

ADC SEN for parallel control

JP11

Short 1 - 2

ADC parallel control

2.3

Test Set-Up Connections

Connect the ADS42B4x EVM to TSW1400 EVM

Connect 5-V power to banana jack at J10; connect ground to J12

Connect USB cable to programming computer at J17

Connect USB and power supply jack to TSW1400

Connect the clock signal through the appropriate BPF to J19

Connect the input signal through the appropriate BPF to J6/J3

6

ADS42B4x EVM

SLAU477A – December 2012 – Revised January 2015

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Copyright © 2012–2015, Texas Instruments Incorporated

Содержание ADS42B4 Series

Страница 1: ...S42Bxx_GUI Front Panel Top Level 3 2 ADS42B4xEVM and TSW1400 4 3 Test Set Up Block Diagram 5 4 High Speed Data Converter Pro 7 5 ADS42Bxx GUI 8 6 FFT Plot 250 MHz clock 170 MHz Input to Channel A 9 7 FFT Plot 250 MHz clock 170 MHz Input to Channel B 9 List of Tables 1 Default ADS42Bxx EVM Revision A Jumper Setting for Serial Interface 5 2 Parallel Interface with Pin Control of ADS58C28 and ADS42Bx...

Страница 2: ...ront panel that has register tabs The GUI tab provides an interface to the most used registers 1 2 1 Top Level Figure 1 shows the top level tab of the register user interface Below is a brief explanation of the controls Please refer to the ADS42B49 datasheet for more detailed explanations of the register functions as needed Reset Device reset clicking this switch resets the device Powerdown Global...

Страница 3: ...Programming Channel B for different offset pedestals Figure 1 ADS42Bxx_GUI Front Panel Top Level 1 2 2 Register Control Send All Sends all the register configurations on the panel to the device Read All Not active Save Saves the register configuration to text file Load Loads a register file from a text file After loading registers the relative switches and selecting boxes are automatically updated...

Страница 4: ...is USB Status has to be turned to Green Exit Stops the program 2 Basic Test Procedure This section outlines the basic test procedure for testing the EVM Figure 2 shows how to connect the ADS42B4xEVM to TSW1400 Figure 2 ADS42B4xEVM and TSW1400 4 ADS42B4x EVM SLAU477A December 2012 Revised January 2015 Submit Documentation Feedback Copyright 2012 2015 Texas Instruments Incorporated ...

Страница 5: ...ly for 1 8VA JP16 Short 1 2 DC supply for 1 8VD JP17 Short 3 2 DC supply LDO for 5V JP19 Short 3 2 DC supply LDO for 1 8V JP28 Short 3 2 DC supply LDO for 5V JP29 Short 3 2 DC supply LDO for 3 3VCLK JP26 Open DC supply for ext buffer JP27 Open DC supply for ext buffer JP3 Short 2 3 OPA power down JP4 Short 2 3 OPA power down JP22 Open SDOUT to FPGA JP20 Short 1 2 CDC JP21 Short 1 2 CDC J14 Short 1...

Страница 6: ...d ADS42Bxx EVM Revision B Jumper Setting Jumper Position Function JP8 Short 1 2 ADC SCLK for parallel control JP9 Short 1 2 ADC SDATA for parallel control JP10 Short 1 2 ADC SEN for parallel control JP11 Short 1 2 ADC parallel control 2 3 Test Set Up Connections Connect the ADS42B4x EVM to TSW1400 EVM Connect 5 V power to banana jack at J10 connect ground to J12 Connect USB cable to programming co...

Страница 7: ...I ADC Selection pull down menu Select Single Tone for FFT from the Test pull down menu Select the desired channel that is Channel A or B from the Channel Display pull down menu Check the box for Auto Calculation of Coherent Frequencies Change the ADC sampling rate to the desired value that is 250 MHz Change the input frequency to desired value that is 170 MHz or other Verify status display in the ...

Страница 8: ...displayed in HSDCPro Select the proper Display Channel in HSDCPro corresponding to the input connection Use a high quality low phase noise generator for this input to ensure proper device evaluation A tight bandpass filter is required to achieve optimal performance Open the ADS42B4x GUI by going to the Start Menu and finding ADS42B4x GUI in the Texas Instruments folder Press the Reset button Press...

Страница 9: ...ADS42B4xEVM SNR is 69 85 dBFS and SFDR is 82 85 dBFS Figure 6 FFT Plot 250 MHz clock 170 MHz Input to Channel A Figure 7 shows the performance of channel B from ADS42B4xEVM SNR is 69 94 dBFS and SFDR is 84 77 dBFS Figure 7 FFT Plot 250 MHz clock 170 MHz Input to Channel B 9 SLAU477A December 2012 Revised January 2015 ADS42B4x EVM Submit Documentation Feedback Copyright 2012 2015 Texas Instruments ...

Страница 10: ...nstall R129 Do not install install R143 Install Do not install R141 Install Do not install R131 Do not install Install R132 Do not install Install R93 Install Do not install R94 Install Do not install R95 Do not install Install R96 Do not install Install R97 Install Do not install R98 Install Do not install R99 Do not install Install R114 Do not install Install SJP3 Shunt 2 3 default Shunt 1 2 SJP...

Страница 11: ...04 MHz VCXO on board the CDC outputs a LVCMOS clock at U0P pin7 at 245 76 MHz With a 491 52 MHz VCXO the CDC outputs a LVCMOS clock at U0P at 122 88 MHz The clock goes through an on board crystal BPF Y0 and is used as the input clock to the ADC through SJP6 3 3 Parallel CMOS Output The default ADC output is configured as DDR LVDS output on the EVM The layout provides an option of 1 8 V parallel CM...

Страница 12: ...le 5 Changed content of the bullets in TSW1400 Quick Start Operation section 7 Added content in the ADS42B4x Test Procedure section 8 Added new image in the ADS42B4x Test Procedure section 8 Changed FFT Plot 250 MHz clock 170 MHz Input to Channel A image 9 Changed FFT Plot 250 MHz clock 170 MHz Input to Channel B image 9 NOTE Page numbers for previous revisions may differ from page numbers in the ...

Страница 13: ...ring the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty If TI elects to repair or replace such EVM TI shall have a reasonable time to repair such EVM or provide replacements Repaired EVMs shall be warranted for the remainder of the original warranty period Replaced EVMs shall be warranted for a new full ninety 90 day warranty period 3 ...

Страница 14: ...io transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated Antenna types not included in this list having a gain greater than the maximum gain indicated for that type are strictly prohibited for use with this device Concernant les EVMs avec antennes d...

Страница 15: ... any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operation even with the inputs and outputs kept within the specified allowable ranges some circuit components may have elevated case temperatures These components include but are not limited to linear regulators switching transistors pass transistors current sense...

Страница 16: ...F REMOVAL OR REINSTALLATION ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES RETESTING OUTSIDE COMPUTER TIME LABOR COSTS LOSS OF GOODWILL LOSS OF PROFITS LOSS OF SAVINGS LOSS OF USE LOSS OF DATA OR BUSINESS INTERRUPTION NO CLAIM SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED 8 2 Specific Limitations IN NO EVENT SHALL T...

Страница 17: ...esponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related information or support that may be provided by TI Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failur...

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