Chapter 2
Hardware Configuration and Installation
© National Instruments Corporation
2-9
VXI-SB2020 and NI-VXI for Solaris
When the VXI-MXI is installed in Slot 0, it becomes the VMEbus System Controller (set by
slide switches S1 and S8). As a VMEbus System Controller, it has VMEbus Data Transfer Bus
Arbiter (PRI ARBITER) circuitry that accepts bus requests on all four VMEbus request levels,
prioritizes the requests, and grants the bus to the highest priority requester. As VMEbus System
Controller, the VXI-MXI also drives the 16 MHz VMEbus system clock by an onboard 16 MHz
oscillator with a 50%
±
5% duty cycle.
The VXI-MXI also performs VMEbus BTO functions as described in the following section. The
setting of the VME BTO Chain Position jumper block determines how to control these functions.
As required by the VXIbus specification for a Slot 0 device, the VXI-MXI drives the 10 MHz
signal, CLK10, on a differential ECL output. This is controlled by the CLK10 Source Select
jumpers at locations W9 and W10. The Slot 0 setting of the CLK10 Source Select jumpers cause
the VXI-MXI to drive CLK10 on the backplane. When configured for Non-Slot 0, the VXI-MXI
instead receives the CLK10 signal.
Warning:
Configuring more than one VXIbus device to drive the CLK10 lines can
damage the VXIbus backplane or the CLK10 drivers on the VXIbus devices.
VMEbus BTO
The VMEbus Bus Timeout (BTO) is a watchdog timer for transfers on the VMEbus Data
Transfer Bus. After a specified amount of time (usually user-configurable), the BTO circuitry
terminates a VMEbus cycle if no slave has responded. The VXI-MXI must provide the VMEbus
BTO to function properly because, when a MXIbus cycle is involved, the VMEbus timeout must
be disabled and the MXIbus BTO enabled. You should disable the BTO of any other BTO
module residing in the mainframe. If this is not possible, set it to its maximum setting to give the
MXIbus cycles as much time as possible to complete.
VXI Logical Address
Each device in a VXIbus/MXIbus system is assigned a unique number between 0 and 254. This
8-bit number, called the logical address, defines the base address for the VXI configuration
registers located on the device. With unique logical addresses, each VXIbus device in the system
is assigned 64 bytes of configuration space in the upper 16 KB of A16 space.
Some VXIbus devices have dynamically configurable logical addresses. These devices have an
initial logical address of hex FF, which indicates that they can be dynamically configured. While
the VXI-MXI does support dynamic configuration of VXI devices within its mainframe, it is
itself a statically configured device and is preset at the factory with a VXI logical address of 1.
The SB-MXI is designated as the VXIbus Resource Manager (RM). The RM in a VXI system is
defined to have a logical address of 0. The logical address of the SB-MXI is software
configurable.
Ensure that no other statically configurable VXIbus devices have logical addresses of either 0 or
1. If they do, change the logical address settings of the other devices so that every device in the
system has a unique associated logical address.
