
Bank 4 Prototyping Area
Figure 15. Bank 4 Prototyping Area
Table 21. CPLD Connectivity to Bank 4 Prototyping Area
Bank 4 Lattice
Lattice
Location
Schematic
Name
8
CPLD
Bank
CPLD
Pin
HDL Name
Physical Channel
Name
A17
Bank4_IO(161)
4
M10
cBank4ioA(0) Bank4_PortA_DIO0
A16
Bank4_IO(162)
4
M11
cBank4ioA(1) Bank4_PortA_DIO1
A15
Bank4_IO(163)
4
M12
cBank4ioA(2) Bank4_PortA_DIO2
A14
Bank4_IO(164)
4
M6
cBank4ioA(3) Bank4_PortA_DIO3
A13
Bank4_IO(165)
4
M7
cBank4ioA(4) Bank4_PortA_DIO4
A12
Bank4_IO(168)
4
N10
cBank4ioA(5) Bank4_PortA_DIO5
A11
Bank4_IO(169)
4
N11
cBank4ioA(6) Bank4_PortA_DIO6
A10
Bank4_IO(170)
4
N12
cBank4ioA(7) Bank4_PortA_DIO7
C10
Bank4_IO(171)
4
N5
cBank4ioB(0) Bank4_PortB_DIO0
C11
Bank4_IO(188)
4
R11
cBank4ioB(1) Bank4_PortB_DIO1
8
In the silkscreen, these signals are marked as CPLD(Pin Number) for space reasons.
SLSC-12101 User Guide
|
© National Instruments
|
35