Figure 9. SLSC-12101 Block Diagram
Prototyping
Area Banks
Front Panel
LEDs
Temperature
Sensors
Alarms
Other Internal
Registers
4x Temp Sensor
Channels
Rdy/Rst#
SLSC-12101 Controller
(5M1270ZF25615N)
SpiClk
SpiMOSI
ED_SS#
ID_SS#
Int#
TTM
TFM
Id SPI Channel
MISO
ID_SS
SpiClk
SpiMosi
SpiMISO
RegInterf
ace Bus
IoPort.vhd
Interrupt.vhd
Interrupt
LEDs
17x I/O
Ports
EdBlock
SPI
Channel
Select
SpiChannelSelect.vhd
EdBloc
k RegInterf
ace
(cRegP
or
tOut, cRegP
or
tIn)
EdBlock.vhd
Spi.vhd
Control.vhd
CrcGen.vhd
SlscCpldTop.vhd
Table 2. Main Files Included in the Module Development Kit (Without Dependencies)
File Name
Notes
Slsc12101Top.vhd
Top-level file which can be compiled to generate a programming
bitfile for the CPLD
SlscCpldTop.qpf
Quartus II project file
SlscCpldTop.qsf
Quartus II settings file
SlscCpldTop.sdc
Constraints file
SlscCpldTop.pof
Programming bitfile
EdBlock Implementation
The EdBlock abstracts out the frames received through the SPI lines of the SLSC interface
into a register port. You can use it to easily implement registers in your design by calling the
RegisterRead and RegisterWrite functions declared in the
PkgEdBlock.vhd
file. You will
only need to focus on implementing a digital circuit that converts these register accesses into
useful control and monitor signals in your design.
The Error Detection block is implemented in VHDL and consists of the following files:
SLSC-12101 User Guide
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© National Instruments
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