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Chapter 2
Using the Module
Buffered Mode Acquisitions
In Buffered Mode, the PXIe-4340 uses digital filters to provide an accurate representation of
core displacement while rejecting the excitation. These filters discriminate between signals
based on the frequency range or bandwidth of the signal. Signals within the digital filter
bandwidth, centered around the excitation frequency, are returned.
Buffered Mode Filters
A digitizer or ADC might sample signals containing frequency components above the Nyquist
limit. The undesirable effect of the digitizer modulating out-of-band components into the
Nyquist bandwidth is aliasing. The greatest danger of aliasing is that you cannot determine if
aliasing occurred by looking at the ADC output. If an input signal contains several frequency
components or harmonics, some of these components might be represented correctly while
others contain aliased artifacts.
Lowpass filtering to reduce components above the Nyquist frequency either before or during the
digitization process can reduce the magnitude of aliased components. In Buffered Mode, the
PXIe-4340 employs both digital and analog lowpass filters to achieve this protection.
In Buffered Mode, the PXIe-4340 uses an oversampled architecture and sharp digital filters
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with cut-off frequencies that track the sampling rate. Therefore, the filter automatically adjusts
to follow the Nyquist frequency. This filtering is performed in addition to the filtering provided
by the demodulator. This means that the digital filter bandwidth increases until reaching the full
bandwidth of the demodulation filter, where it stops increasing with sample rate. Refer to the
NI PXIe-4340 Device Specifications
for the aggregate digital filter bandwidth in Buffered Mode.
Filter Group Delay
The digital filtering performed by the PXIe-4340 produces a delay of many samples worth of
time between when an event occurs on the input signal going into the PXIe-4340 and when the
data associated with that event is available at the output of the acquisition and filtering process.
This delay is called the group delay.
In order to simplify synchronization with other modules, the PXIe-4340 compensates for this
group delay in the following ways:
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The Sample Clock output from the PXIe-4340 is generated at the point in time when the
input signal is valid at the ADC input pins. When acquiring data, the PXIe-4340 generates
a Sample Clock, then waits for the data associated with that Sample Clock to be acquired,
then returns that data. As a result, any other acquisitions timed with this Sample Clock line
up with the data returned by the PXIe-4340.
•
Any triggers generated or received by the PXIe-4340 are interpreted based on their
relationship to the Sample Clock. For example, a Start Trigger that starts an acquisition
results in data from the next Sample Clock being returned as the first point in the
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Looser filters with degraded alias-free bandwidth are used for sample rates <25 Hz. This is done in order
to reduce the large group delays associated with filtering at lower sample rates.