© National Instruments
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I-1
Index
B
backplane
hybrid peripheral slots, 1-6
interoperability with CompactPCI, 1-5
overview, 1-5
PXI Express peripheral slots, 1-6
PXI local bus, routing, 1-8
PXI peripheral slots, 1-6
PXIe_SYNC_CTRL, 1-11, 1-12
specifications, A-6
system controller slot, 1-5
system reference clock, 1-9
default behavior (figure), 1-10
routing (figure), 1-10
system timing slot, 1-6
trigger bus, 1-8
C
CE compliance specifications, A-5
chassis ambient temperature definitions, 2-4
chassis configuration Web page (figure), 2-11
chassis cooling considerations
ambient temperature definitions, 2-4
clearances, 2-2
chassis description, 1-3
chassis fan LED behavior (table), 2-14
chassis initialization file, 2-18
chassis LED indicators, 2-12
chassis ventilation (figure), 2-4
cleaning chassis, 3-1
clearances for chassis cooling, 2-2
CLK10 rear connectors, 2-15
CompactPCI, interoperability with
configuration in MAX (figure), 2-16
configuration.
cooling
air cooling of PXIe-1066DC chassis, 2-2
filler panel installation, 2-5
setting fan speed, 2-5
slot blocker installation, 2-5
D
DC input connector (figure), 2-6
default configuration settings, 2-12
dimensions (figure), A-9, A-10
E
electromagnetic compatibility, A-5
EMC filler panel kit, 1-4
Ethernet LED behavior (figure), 2-12
external clock source specifications, A-7
F
fan access door clearance (figure), 2-5
fan assembly (figure), 3-7
fan, setting speed, 2-5
filler panel installation, 2-5
H
hybrid peripheral slots, description, 1-6
hybrid slot pinouts
P1 connector (table), B-8
XP3 connector (table), B-9
XP4 connector (table), B-10
I
IEC 320 inlet, 1-4, 3-3, 3-4, 3-7
inhibit mode switch, 2-15
installation, configuration, and operation
chassis initialization file, 2-18
configuration in MAX (figure), 2-16
filler panel installation, 2-5
installing a PXI Express system
module installation
