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Figure 7. PCIe-6593 Block Diagram

MgtPortRx(7:4), MgtPortTx(7:4)

MgtRefClk(1)

(User Clock 2)

MgtRefClk(0)

(User Clock 1)

Control and Status

User Clock 0

MgtRefClk(2) (User Clock 3)

Clocking

MgtPortRx(3:0), MgtPortTx(3:0)

PORT 1

Mezzanine
Connector 

CLK OUT

CLK IN

to Bank 227

to Bank 226

to

Configuration

GPIO 

PORT 0

Accessing FlexRIO with Integrated I/O
Examples

The FlexRIO driver includes several example applications for LabVIEW. These examples
serve as interactive tools, programming models, and as building blocks in your own
applications. To access all FlexRIO with Integrated I/O getting started examples, complete the
following steps.
1.

In LabVIEW, click 

Help

 »

Find Examples

 .

2.

In the 

NI Example Finder

 window that opens, click 

Hardware Input and Output

 »

FlexRIO

 »

Integrated IO

 »

Getting Started

 .

3.

Double click 

Getting Started with FlexRIO Integrated IO.vi

.

The 

FlexRIO with Integrated IO Project Creator

 window opens.

4.

Select the example that corresponds to the name of your FlexRIO module. The

Description

 window includes a short description of the getting started example for your

device. Rename the project, select a location for the project, and click 

OK

.

The 

Project Explorer

 window for your new project opens.

Online examples are also available to demonstrate FlexRIO basics, such as using DRAM,
acquiring data, and performing high throughput streaming. To access these examples, search

FlexRIO examples

 in the 

Search the community

 field at 

ni.com/examples

.

PCIe-6593 Getting Started Guide

  | 

© National Instruments Corporation

  | 

11

Содержание PCIe-6593

Страница 1: ...e PCIe 6593 in MAX 5 PCIe 6593 Front Panel and Pinouts 6 Block Diagrams 10 Accessing FlexRIO with Integrated I O Examples 11 Common FlexRIO with Integrated I O Examples 12 Component Level Intellectual...

Страница 2: ...ts Supported Application Development Environments ADEs Known issues and bug fixes Recent updates FlexRIO Help FlexRIO driver API and programming information I O Component Level IP CLIP development inf...

Страница 3: ...Active Optical Cable 10 m NI part number 788257 10 QSFP28 Passive Cable 0 5 m NI part number 788256 0R5 1 m NI part number 788256 01 2 m NI part number 788256 02 Notice When the system is deployed at...

Страница 4: ...y messages during installation Accept the prompts to complete the installation 4 When the installer completes select Restart in the dialog box that prompts you to restart shut down or restart later In...

Страница 5: ...o the PCI Express FlexRIO device 8 Reinstall any access panels on the computer case 9 Power on your computer Configuring the PCIe 6593 in MAX Use Measurement Automation Explorer MAX to configure your...

Страница 6: ...re by selecting the item in the configuration tree and clicking Self Test in the MAX toolbar The MAX self test performs a basic verification of hardware resources PCIe 6593 Front Panel and Pinouts Fig...

Страница 7: ...SMA female connector Input for an external Reference Clock Figure 4 Digital I O Connector Pinout A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 B1 B2 B3 B4 B5 B6 B7 B8 B9...

Страница 8: ...DA GND SCL Vcc Rx 19 18 17 16 15 14 13 12 11 29 10 20 21 22 23 24 25 26 27 28 9 8 7 6 5 4 3 2 1 30 31 32 33 34 35 36 37 38 Vcc1 LPMode GND Tx3p Tx3n GND Tx1p Tx1n GND ResetL ModSelL GND Tx4p Rx4n GND...

Страница 9: ...erted Data Output 16 GND Ground 17 Rx1p Receiver Non Inverted Data Output 18 Rx1n Receiver Inverted Data Output 19 GND Ground 20 GND Ground 21 Rx2n Receiver Inverted Data Output 22 Rx2p Receiver Non I...

Страница 10: ...Transmitter Inverted Data Input 38 GND Ground Block Diagrams Figure 6 FPGA Carrier Block Diagram DIO Connector Front Panel Adapter Module Connector 5 V 1 8 V 12 V GPIO Configuration GPIO MGTs Referen...

Страница 11: ...Examples 2 In the NI Example Finder window that opens click Hardware Input and Output FlexRIO Integrated IO Getting Started 3 Double click Getting Started with FlexRIO Integrated IO vi The FlexRIO wi...

Страница 12: ...defined and socketed User defined CLIP allows you to insert HDL IP into an FPGA target enabling VHDL code to communicate directly with an FPGA VI Socketed CLIP provides the same IP integration of the...

Страница 13: ...RTSI Note To synchronize the PCIe 6593 with a RTSI supported PCI Express device you need the Compact Synchronization Interface to RTSI Adapter NI part number 787214 01 and a RTSI cable NI part number...

Страница 14: ...6593 Connect the remaining RTSI female connectors on the RTSI cable to the male RTSI connectors on the other PCI Express devices Figure 9 Connecting FlexRIO PCI Express Devices to RTSI Supported PCI E...

Страница 15: ...hat a PCIe 6593 entry appears b If error conditions appear reinstall FlexRIO and the PCIe 6593 What Should I Do if the PCIe 6593 Fails the Self Test 1 Restart the system 2 Launch MAX and perform the s...

Страница 16: ...As and third party legal notices in the readme file for your NI product Refer to the Export Compliance Information at ni com legal export compliance for the NI global trade compliance policy and how t...

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