Chapter 2 Register Map and Descriptions
Static DIO Register-Level Programmer Manual
2-6
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Rising Edge Sensitivity Configuration Registers
RiseEdgeEnable(
N
)
This register enables monitoring of input lines of port
N
for rising edges, where
N
is the port
number in hexidecimal.
Note
Ports can range from 0 to 11 (0x0 to 0xB), depending on your device. For each port,
you must add an additional offset equal to 0x10 time the port number in hex.
Address Offset:
0x42 + 0x(
N
)0
Type:
Read-write
Size:
8-bit
Bit Map:
Bit
Name
Description
7–0
REE(<7..0>)
Write a 1 to a bit to enable monitoring for the
corresponding line.
7
6
5
4
3
2
1
0
REE(7)
REE(6)
REE(5)
REE(4)
REE(3)
REE(2)
REE(1)
REE(0)
Содержание PCI-6528
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