Chapter 4
Analog Input
©
National Instruments Corporation
4-21
Figure 4-13.
Single External Signal Driving ai/SampleClock and ai/ConvertClock
Simultaneously
AI Convert Clock Timebase Signal
The AI Convert Clock Timebase (ai/ConvertClockTimebase) signal is
divided down to provide on of the possible sources for ai/ConvertClock.
Use one of the following signals as the source of
ai/ConvertClockTimebase:
•
ai/SampleClockTimebase
•
20 MHz Timebase
ai/ConvertClockTimebase is not available as an output on the I/O
connector.
AI Hold Complete Event Signal
The AI Hold Complete Event (ai/HoldCompleteEvent) signal generates a
pulse after each A/D conversion begins. You can route
ai/HoldCompleteEvent out to any output PFI <6..9> or RTSI <0..7>
terminal.
The polarity of ai/HoldCompleteEvent is software-selectable, but is
typically configured so that a low-to-high leading edge can clock external
AI multiplexers indicating when the input signal has been sampled and can
be removed.
• One External Signal Driving Both Clocks
ai/SampleClock
ai/ConvertClock
Sample #1 Sample #2 Sample #3
1 2 3
0
1 2 3
0
1 …
0
Channel Measured
Содержание PCI-6238
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