Chapter 3
Hardware Overview
3-6
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National Instruments Corporation
optimal value is 1.0, but typically it falls between 0.95 and 1.05,
depending on camera quality.
•
Field—For an interlaced video signal, a field is half the number of
horizontal lines needed to represent a frame, as shown in Figure 3-3.
The first field of a frame contains all the odd-numbered lines. The
second field contains all of the even-numbered lines.
Figure 3-3.
Video Field
•
Frame—A frame is a complete image. In interlaced formats, a frame is
composed of two fields.
Programming Video Parameters
You can program all of these video parameters on the PCI/PXI-1407:
•
Programmable pixel and line count—The PCI/PXI-1407 uses an
advanced genlock circuit to generate an internal PCLK. This circuit
generates a PCLK frequency from 11.7 to 15.8 MHz, depending on the
total number of pixels per line. The standard sampling rate for RS-170
video signals is 12.27 MHz, and the standard sampling rate for CCIR
is 14.75 MHz.
The PCI/PXI-1407 also includes a programmable line count, which
you use to switch between RS-170 (525 lines) and CCIR (625 lines).
•
Acquisition window—After setting the pixel and line count, you must
program the active pixel region and active line region. The active pixel
region selects the starting pixel and number of pixels to be acquired
relative to the HSYNC signal. The active line region selects the starting
line and number of lines to be acquired relative to the VSYNC signal.
•
Region of interest—The PCI/PXI-1407 uses a second level of active
pixel and active line regions for selecting a region of interest. When
you disable the region-of-interest circuitry, the board stores the entire
acquisition window in system memory. However, when you enable the
Vertical Sync
Line Region
Horizontal
Sync
Video
Line
