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PXIe-5673E Calibration Procedure
If the results are within the selected test limit, the device has passed this portion of the
verification.
Verifying Noise Floor
Complete the following steps to verify the noise floor performance of an PXIe-5673E module
using a spectrum analyzer.
1.
Connect the PXIe-5611 RF OUT front panel connector to the spectrum analyzer RF INPUT
front panel connector through the SMA(m)-to-SMA(m) cable.
2.
Connect the PXIe-5650/5651/5652 REF IN/OUT front panel connector to any rubidium
frequency reference rear panel BNC connector through the BNC(m)-to-SMA(m) cable.
3.
Connect any available rubidium frequency reference rear panel BNC connector to the
spectrum analyzer REF IN rear panel connector through the BNC(m)-to-BNC(m) cable.
4.
Generate an arbitrary waveform signal using an array of all zeros with the following
niRFSG property settings:
•
Frequency (Hz): 85 MHz
•
Power Level (dBm): +10 dBm
•
Generation Mode: Arb Waveform
•
Power Level Type: Peak Power
•
Reference Clock Source: RefIn
5.
Measure the output noise floor 2 MHz above the generated frequency using the spectrum
analyzer. Minimize the spectrum analyzer noise contribution by using the preamplifier,
minimal attenuation, and a low reference level. Use the following spectrum analyzer
parameter settings:
•
Center frequency: (Frequency in step 4) + 2 MHz
•
Reference level: -50 dBm
•
Frequency span: 0 Hz
•
Resolution bandwidth: 100 kHz
•
Sweep time: 5 ms
•
Reference clock source: External
Table 9.
Intermodulation Products Verification Test Limits
with -36 dBm per Tone
CW Source
LO Frequencies
R3 Upper Limits (dBc)
PXIe-5650/5651/5652
85 MHz to 250 MHz
-51
>250 MHz to 1.3 GHz
-54
PXIe-5651/5652
>1.3 GHz to 3.3 GHz
-50
PXIe-5652
>3.3 GHz to 6.6 GHz
-50
