Chapter 2
Hardware Overview
NI PXI-562x User Manual
2-8
ni.com
Synchronizing Multiple PXI Devices
The NI 562
x
uses a PLL to synchronize the 64 MHz sample clock to a
10 MHz reference clock. You can either supply the reference clock through
the SMA connector (REF CLK IN) on the front panel or use the system
reference clock on the PXI backplane.
The PXI bus and the NI 562
x
have the following timing and triggering
features that you can use for synchronizing multiple digitizers:
•
System Reference Clock—A 10 MHz clock on the PXI backplane
with ±100 ppm accuracy. It is independently distributed to each PXI
peripheral slot through equal-length traces with a skew of less than
1 ns between slots. Multiple devices can use this common timebase for
synchronization, which allows each NI 562
x
to phase lock to the
system reference clock.
•
SMA connector (REF CLK IN)—A 10 MHz reference input that you
can use to connect an external frequency source for synchronization.