Chapter 4
Connecting Signals
4-26
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CONVERT* Signal
Any PFI pin can receive as an input the CONVERT* signal, which is
available as an output on the PFI2/CONVERT* pin.
Refer to Figures 4-20 and 4-21 for the relationship of CONVERT* to the
DAQ sequence.
As an input, CONVERT* is configured in the edge-detection mode. You
can select any PFI pin as the source for CONVERT* and configure the
polarity selection for either rising or falling edge. The selected edge of
CONVERT* initiates an A/D conversion.
As an output, CONVERT* reflects the actual convert pulse that is
connected to the ADC even if another PFI is externally generating the
conversions. The output is an active low pulse with a pulse width of
50 to 100 ns. This output is set to high-impedance at startup.
Figures 4-20 and 4-21 show the input and output timing requirements for
CONVERT*.
Figure 4-20.
CONVERT* Input Signal Timing
Figure 4-21.
CONVERT* Output Signal Timing
Rising-Edge
Polarity
Falling-Edge
Polarity
t
w
= 10 ns minimum
t
w
t
w
t
w
= 50 – 100 ns