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National Instruments Corporation
37
NI 5731/5732/5733/5734R User Guide and Specifications
Connector type .......................................................SMB
Input impedance.....................................................50
Input coupling ........................................................AC
Input voltage range ................................................0.40 V
pk-pk
to 5.2 V
pk-pk
Absolute maximum voltage ...................................±8.0 V DC, 8.0 V
pk-pk
AC
Duty cycle ..............................................................40% to 60%
Table 15.
NI 5731/5732/5733/5734 Clock Sources
Clock
Configuration
Supported Sample
Rates
External
Clock
Type
External Clock
Frequency
Description
Internal Clock
PLL Off
NI 5731 = 40 MS/s
NI 5732 = 80 MS/s
NI 5733 = 120 MS/s
NI 5734 = 120 MS/s
—
—
The internal VCXO
acts as a free-running
clock.
Internal Clock
PLL On
(IoModSyncClk)
NI 5731 = 40 MS/s
NI 5732 = 80 MS/s
NI 5733 = 120 MS/s
NI 5734 = 120 MS/s
—
10 MHz
The internal VCXO
locks to
IoModSyncClk (Sync
Clock), which is
provided only through
the backplane of
supported devices.
Internal Clock
PLL On
(CLK IN)
NI 5731 = 40 MS/s
NI 5732 = 80 MS/s
NI 5733 = 120 MS/s
NI 5734 = 120 MS/s
Reference
clock
10 MHz
The internal VCXO
locks to an external
Reference clock,
which is provided
through the CLK IN
front panel connector.
External Clock
(CLK IN)
The supported
sample rate is equal
to the external clock
frequency.
Sample
clock
NI 5731 Min = 3 MHz
NI 5731 Max = 40 MHz
NI 5732 Min = 20 MHz
*
NI 5732 Min = 10 MHz
†
NI 5732 Max = 80 MHz
NI 5733 Min = 50 MHz
NI 5733 Max = 120 MHz
NI 5734 Min = 50 MHz
NI 5734 Max = 120 MHz
An external Sample
clock can be provided
through the CLK IN
front panel connector.
*
Duty Cycle Stabilizer (DCS) enabled. DCS enabled is the default setting for all NI 5731/5732/5733/5734 CLIP items. You
can disable the DCS by adjusting register 9 in the ADC.
†
DCS disabled.
Содержание NI 5731
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