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Chapter 4
Developing with LabVIEW FPGA
During interactive front panel communication, you cannot use LabVIEW debugging tools,
including probes, execution highlighting, breakpoints, and single-stepping. To identify errors
before you compile, download, and run the FPGA VI on the FPGA target, consider using a test
bench.
Note
You cannot use interactive front panel communication while the FPGA is
configured to execute on a third-party simulator. You can either use a host VI to
execute the FPGA VI or change the execution mode of the FPGA target by
right-clicking the FPGA target in the Project Explorer window and selecting
Select
Execution Mode
.
Using the NI Common Instrument Design Libraries
NI provides instrument design libraries that you can use to create application-specific
instrumentation designs for NI-793xR devices. The following sections provide an overview of
the instrument design libraries. The instrument design libraries are located at
<LVDir>\
instr.lib\_niInstr
. For information about the VIs in each instrument design library, refer
to the Programming section of the
FlexRIO Help
.
Using niInstr Instruction Framework
Use the Instruction Framework instrument design library to build a communication network in
LabVIEW FPGA. Standard communication methods, such as using controls and indicators to
pass information between the host and the FPGA, may not scale well for large applications. Use
the Instruction Framework to provide a scalable communication framework that larger
applications may require, at the cost of increased complexity. Certain instrument design libraries
require the use of the Instruction Framework.
Streaming Overview
The Streaming Instrument Design Library provides a consistent mechanism to handle both finite
and continuous transfer streams. It provides stream monitoring and handshaking. It contains VIs
for both the Host and FPGA.
CLIP Adapters Overview
The CLIP Adapters instrument design library includes AXI4-Lite and AXI4-Stream wrappers.
These wrappers implement protocol timing and signaling into simple reader or writer endpoints
that present 4-wire handshaking to the diagram. This handshaking allows for easier transition to
many FPGA features without the need to implement this state logic on your own.
Data Trigger Overview
This instrument design library can be used to generate a trigger on an input signal under various
conditions. The triggers produced by this library are typically consumed by the acquisition block
in order to determine when to start and stop acquiring data.
This library supports multiple trigger types, data types, and samples per cycle.
