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Table 2. Device Front Panel Icon Definitions
Refer to the user documentation for required maintenance measures to ensure user
safety and/or preserve the specified EMC performance.
The signal pins of this product's input/output ports can be damaged if subjected to
ESD. To prevent damage, turn off power to the product before connecting cables and
employ industry-standard ESD prevention measures during installation, maintenance,
and operation.
Table 3. ATCA-3671 Front Panel Connectors
Connector
Description
JC OUT
Conditioned output clock for CPRI and clock distribution applications.
CLK IN/OUT General purpose clock to and from the FPGA.
AIO
Daughtercards for RF front-ends and high-bandwidth expansion modules.
GPIO
Low speed, parallel I/O expansion to your module.
SYNC
Low skew trigger and clock distribution to FPGAs.
AIO CLK
Direct clock distribution to AIO modules.
JTAG
JTAG/UART access for system debugging and management.
1Gb ETH
Network connection to ATCA-3671 controller.
MGT REF
Clock input for GTH reference on FPGAs.
Caution
To avoid permanent damage to the ATCA-3671, disconnect all signals
connected to the ATCA-3671 before powering down the module, and connect
signals only after the ATCA-3671 has powered on.
Caution
Connections that exceed any of the maximum ratings of any connector on
the ATCA-3671 can damage the device and the chassis. NI is not liable for any
damage resulting from such connections.
Table 4. ATCA-3671 Front Panel LEDs
Color
State
Indication
OFF
—
The module is not active.
Green Blinking The module is powering on.
Solid
The module is powered on.
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ATCA-3671 Getting Started Guide