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National Instruments Corporation
7
USB-6525 User Guide and Specifications
Digital Filtering Example
Figure 5 shows a filter configuration with a t
interval
filter interval
(t
interval
/2 filter clock).
Figure 5.
Digital Filtering Example
In periods A and B, the filter blocks the glitches because the external signal
does not remain steadily high from one rising edge of the filter clock to the
next. In period C, the filter passes the transition because the external signal
remains steadily high. Depending on when the transition occurs, the filter
may require up to two filter clocks—one full filter interval—to pass a
transition. The figure shows a rising (0 to 1) transition. The same filtering
applies to falling (1 to 0) transitions.
Change Detection
You can program the NI 6525 to send an interrupt when a change occurs on
any input line.
The NI 6525 can monitor changes on selected input lines or on all input
lines. It can monitor for rising edges (0 to 1), falling edges (1 to 0), or both.
When an input change occurs, the NI 6525 generates an interrupt, and the
NI-DAQ driver then notifies the software.
Note
Excessive change detections can affect system performance. Use digital filtering to
minimize the effects of noisy input lines.
The NI 6525 sends a change detection when any one of the changes occurs,
but it does not report which line changed or if the line was rising or falling.
After a change, you can read the input lines to determine the current line
states. The maximum rate of change detection is determined by the
software response time, which varies from system to system.
H
H
H
H
H
H
L
L
H
H
H
L
L
H
H
A
B
C
Sa
mple Clock
Extern
a
l
S
ign
a
l
Sa
mpled
Filtered
S
ign
a
l
Extern
a
l
S
ign
a
l
Filter
Clock