©
National Instruments Corporation
7
NI 6584R User Guide and Specifications
Using Your NI 6584R with a LabVIEW FPGA Example VI
The NI FlexRIO Adapter Module Support software includes a variety of example projects to help get
you started creating your LabVIEW FPGA program. This section demonstrates how to use an existing
LabVIEW FPGA example project and a basic universal asynchronous receiver/transmitter (UART)
interface to perform serial generation and/or acquisition with the NI 6584R. This example requires an
NI VHDCI-to-Eight DB9 cable. If you are operating an unterminated device, NI recommends that you
use external termination.
Note
Examples available for your device are dependent on the device-specific minimum software
requirements. For more information about the minimum software requirements for your device, visit
ni.com/info
and enter
rdsoftwareversion
as the Info Code.
Each NI 6584R example project includes the following parts:
•
A LabVIEW FPGA VI that can be compiled and run embedded in FPGA hardware
•
A Host VI that runs in LabVIEW for Windows and interacts with the LabVIEW FPGA VI
Note
In NI application software, NI FlexRIO adapter modules are referred to as
IO Modules
.
Complete the following steps to run an example that generates and/or acquires data.
1.
Connect the VHDCI end of an NI VHDCI-to-Eight DB9 cable to Connector 0 (Ports 1–8) on the
NI 6584R.
2.
Connect the Port 1 DB9 connector from the NI VHDCI-to-Eight DB9 cable to the DUT with
proper termination.
Note
This exercise shows how to complete these tasks for the full duplex version of the NI 6584. To
complete these tasks with a different hardware version of the NI 6584, replace every instance of
Full
Duplex
in these instructions with
Half Duplex, Full Duplex No Termination,
or
Half Duplex No
Termination
,
depending on which device you are using.
3.
Launch LabVIEW.
4.
In the
Getting Started
window, select
Find Examples
to display the NI Example Finder.
5.
In the
NI Example Finder
window, select
Hardware Input and Output»FlexRIO»IO Modules»
NI 6584
.
6.
Select
NI 6584 Basic Software UART Full Duplex.lvproj
.
7.
In the
Project Explorer
window, double-click
NI 6584 Basic Serial UART Full Duplex
(Host).vi
under
My Computer
. The host VI opens. This VI uses the NI 7952R as the FPGA target
by default. To use the NI 6584, complete the following steps to change the FPGA target.
Note
All example projects are configured for RIO0. If your device is not named RIO0 (verify in
MAX), you must update the target device name by right-clicking your device in the
Project
Explorer
window, selecting
Properties
, and entering the correct target device name in the
Resource
control.
a.
Select
Window»Show Block Diagram
to open the VI block diagram.
b.
On the block diagram, right-click the Open FPGA VI Reference (PXI-7952R) function and
select
Configure Open FPGA VI Reference
.
c.
In the
Configure Open FPGA VI Reference
window, click the
Browse Project
button in the
Open VI section.
d.
In the
Select VI
window that opens, expand the tree view for your device, select the VI under
your device and click
OK
.
