13. Configure the Read/Write Control function by clicking the terminal section labeled
Unselected
, and selecting
IO Module/AI 0 Data N–3
.
14. Click the handle on the bottom of the control node with the Positioning tool and drag the
edge down to add the other signals,
AI 0 Data N–2...AI 0 Data N
, to the Read/Write
Control function.
15. Wire indicators to the output terminals of the
IO Module\AI 0 Data N–3...AI 0 Data N
control node.
16. Add the Close FPGA VI Reference function, located on the
FPGA Interface
palette, to
the right of the While Loop.
17. Wire the
FPGA VI Reference Out
output of the Read/Write Control function to the
FPGA VI Reference In
input of the Close FPGA VI Reference function.
18. Wire the
error out
output of the Read/Write Control function to the
error in
input of the
Close FPGA VI Reference function.
Your block diagram should now resemble the block diagram in the figure below.
Figure 8. 5772SampleAcq (Host).vi Block Diagram
19. Save the VI as
5772SampleAcq(Host).vi
.
Run the Host VI
1.
Connect one end of an SMA cable to AI 0 on the front panel of the NI 5772 and the other
end of the cable to your DUT.
2.
Open the front panel of
5772SampleAcq(Host).vi
.
3.
Click the
Run
button to run the VI.
4.
The VI acquires data from the DUT on
AI 0 Data N
and
AI 0 Data N-1
.
5.
Click the
STOP
button on the front panel and close the VI.
Clocking
The NI 5772 clock source controls the sample rate and other timing functions on the device.
The following table contains information about the possible NI 5772 clock sources.
16 | NI 5772R User Manual and Specifications | ni.com