Theory of Operation
Chapter 3
SCXI-1162 User Manual
3-6
© National Instruments Corporation
Reads from the Module ID or Data Registers require the following steps:
1. SS* goes low, enabling communication with the board. D*/A should be high, indicating
communication with the address handler.
2. Write 0000 or 0001 (hexadecimal) to the Address Handler. This selects the Module ID
Register or the Data Register, respectively.
3. D*/A goes low, indicating communication with a register. This action latches the bits into
the register.
4. The serial data is available on MISO and SPICLK clocks it from the register.
5. SS* goes high and D*/A goes high, indicating an end of communication.
Input Channels
The SCXI-1162 consists of eight banks of four optically isolated digital inputs. Each bank of
outputs has an isolated connection for the Vcc for that bank . The inputs of each bank are
referenced from their particular Vccs; thus, for any bank of inputs to work, a Vcc must be
connected to that particular bank . When an input is driven low, it must be pulled to 4 V below
its respective Vcc with at least 7 mA of current to guarantee a logic low. The Vcc and four
inputs of one bank are isolated from the Vcc and four inputs of any other bank , as well as from
the internal circuitry of the module. The channel and bank assignments are shown in Table 3-2.
Table 3-2. SCXI-1162 Channel and Bank Assignments
Bank
Front Connector Pins
Channels
0
B30, A30, B29, A29, C30
0, 1, 2, 3, Vcc
1
B26, A26, B25, A25, C26
4, 5, 6, 7, Vcc
2
B22, A22, B21, A21, C22
8, 9, 10, 11, Vcc
3
B18, A18, B17, A17, C18
12, 13, 14, 15, Vcc
4
A13, B13, A14, B14, C13
16, 17, 18, 19, Vcc
5
A9, B9, A10, B10, C9
20, 21, 22, 23, Vcc
6
A5, B5, A6, B6, C5
24, 25, 26, 27, Vcc
7
A1, B1, A2, B2, C1
28, 29, 30, 31, Vcc
