Motorola SE4710, Руководство по интеграции

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Control Interface 5 - 3
Transactions
I
2
C transactions control the SE4710, where a transaction consists of a command followed by a response. I
2
C is a
master/slave protocol, meaning the host initiates both transmissions.
The SE4710 typically processes a command in less than 1 ms, but some commands take up to 100 ms. For this
reason, after sending a command, the host (I
2
C master) should request a response, and if the SE4710 does not
respond the host should retry the response request for up to 100 ms. If the SE4710 does not respond within this
time, a hard failure occurred.
The I
2
C format of these commands and responses is as follows.
I
2
C Command Format
<I2C-Start Bit> <SLA-W> <Cmd-Opcode> <[SE4710-Cmd-Data]> <Checksum> <I2C-Stop-Bit>
where:
•
I2C-Start-Bit and I2C-Stop-Bit are as defined by the I
2
C specification
•
SLA-W is 0xB8 (Slave-Addr + Write-Op) or
• Slave Address is 0x5C (or 0xB8 after shifting into 7 MSBs)
• Write-Op is 0x00
•
Opcode is 1 byte from the SE4710 Command Op column in Table 5-3 on page 5-11 .
•
[SE4710-Cmd-Data] is from the SE4710 Command Data column in Table 5-3 on page 5-11 . This can be
NULL.
•
Checksum is a 1 byte checksum of the SE4710 Cmd Data bytes. See Command Checksum on page 5-4 .
I
2
C Response Format
<I2C-Start Bit> <SLA-R> <Rsp-Opcode> <Status> <[SE4710-Rsp-Data]> <I2C-Stop-Bit>
Where:
•
I2C-Start-Bit and I2C-Stop-Bit are as defined by the I
2
C specification
•
SLA-R is 0xB9 (Slave-Addr + Read-Op) or
• Slave Address is 0x5C (or 0xB8 after shifting into 7 msb's)
• Read-Op is 0x01
•
Opcode is 1 byte from the SE4710 Response Op column in Table 5-3 on page 5-11 .
•
Status indicates whether the SE4710 successfully processed the command. See Response Status Code on
page 5-4 .
•
[SE4710-Rsp-Data] is from the SE4710 Response Data column in Table 5-3 on page 5-11 . This can be
NULL.