Motorola PM1200, Базовое руководство по обслуживанию

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October 26, 2007 6880309U09-A
3-6 Basic Theory of Operation : Radio-Frequency Power Amplifier (RF PA) and Output Network (ON)
3.6.1 Gain Stages
The controlled stage consists of a two-stage, integrated amplifier with external matching, which
amplifies the input signal from the VCO buffer and provides drive to the PA-UNIT driver stage.
The next driver stage, Q6004 and Q6005 has a fixed gate bias similar to Q6001. Drain bias is
supplied by the +B voltage from the J6002, DC IN terminal.
The driver stage drives the final stage consisting of two transistors (Q6006, Q6007) operating in
push-pull. These transistors have separate, fixed base biases (Q6003 2SD882Q), and their drain
biases are supplied by the +B voltage from the J6002, DC IN terminal.
The output of the final stage will be routed to the antenna switch, which routes the RF PA to the
harmonic filter/power detector/antenna and isolates the RX front-end in transmit mode. Antenna
switch routes antenna/power detector/harmonic filter to RX and isolates TX with the RX mode. This
mode is determined via J6001 PIN2 TX/RX signal line.
The harmonic filter is a low pass filter that attenuates harmonics generated by the RF PA in transmit
mode and provides additional receive selectivity in receive mode.
3.6.2 Circuit Protection
RF PA final-stage drain current, RF PA final-stage temperature, RF PA control voltage, and battery
voltage are sensed by the power-control circuitry. If a fault condition is detected, the control voltage
is reduced, which cuts back the output power to a level that is safe for the particular conditions.
3.6.3 DC Interconnect
The DC connector (P7001) carries the +B supply for the entire board. This supply is routed directly to
the controller and transmitter circuitry for both direct supply and regulating additional supplies. The
radio chassis is grounded through the PCB screws and also via direct contact to the board. The dash
mount control head receives the +B supply through the 15-pin flex connector.
3.6.4 DCS Demodulator
DCS signals are demodulated on the MAIN-UNIT, and are applied to low-pass filter Q2001
(NJM2902V), as well as the limiter comparator Q2001.
3.6.5 CTCSS encoder/decoder
The CTCSS code is generated and encoded by MPU IC Q2019 (MB90F583B). Demodulation and
detection of the CTCSS tones are carried out by IC Q2013 (MX165C).
3.6.6 MPU
Operation is controlled by the 16-bit MPU IC, Q2019 (MB90F583B). The system clock uses a
16.000 MHz crystal as a time base. The IC Q2036 (RN5VL35AA), resets the MPU when the power is
on. It also monitors the voltage of the regulated 5 V power supply line.
3.6.7 EEPROM
The EEPROM retains TX and RX data for all memory channels and also CTCSS and DCS data,
prescaler dividing, and REF oscillator data (internal/external).