4-6
Computer Group Literature Center Web Site
Functional Description
4
Data Bus Structure
The local bus on the MVME172P4 is a 32-bit synchronous bus that is
based on the MC68060 bus, and which supports burst transfers and
snooping. The various local bus master and slave devices use the local bus
to communicate. The local bus is arbitrated by priority type; the priority of
the local bus masters from highest to lowest is: 82596CA LAN, 53C710
SCSI, VMEbus, and MPU. As a general rule, any master can access any
slave; not all combinations pass the common sense test, however. Refer to
the MVME1X2P4 VME Embedded Controller Programmer’s Reference
Guide and to the user’s guide for each device to determine its port size, data
bus connection, and any restrictions that apply when accessing the device.
Microprocessor
MVME172P4 models may be ordered with an MC68060 or MC68LC060
microprocessor.
The MC68060 has on-chip instruction and data caches and a floating-point
processor. (A floating-point coprocessor is the major difference between
the MC68060 and MC68LC060.) Refer to the MC68060 user’s manual for
more information.
MC68
xx060 Cache
The MVME172P4 local bus masters (VMEchip2, processor, 53C710
SCSI controller, and 82596CA Ethernet controller) have programmable
control of the snoop/caching mode. The IP DMA local bus master’s snoop
control function is governed by the settings of switch S5 segments 1 and 2
(refer to
IP DMA Snoop Control (S5 Pins 1/2)
on page 1-18
). S5
determines the value of the snoop control signal for all IP DMA transfers.
This includes the IP DMA which executes when the DMA control registers
are updated while the IP DMA is operating in command chaining mode.
The MVME172P4 local bus slaves that support the snoop/caching mode
are defined in the “Local Bus Memory Map” section of the MVME1X2P4
VME Embedded Controller Programmer’s Reference Guide.
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