Bringing up the Board
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2-7
2
5. Headers J16 and J17 configure serial ports 1 and 2 to drive or
receive clock signals provided by the TXC and RXC signal lines.
The MVME172P4 is factory-configured for asynchronous
communication: it comes with no jumpers on J16 or J17. Refer to
the instructions in Chapter 1 if your application requires configuring
ports 1 and 2 for synchronous communication.
6. Header J19 enables or disables the IP bus strobe function on the
MVME172P4. The factory configuration puts no jumper on J19,
disabling the Strobe
∗
signal to the Petra/IP2 chip disconnected.
Verify that this setting is appropriate for your application.
7. The jumpers on header J22 establish the SRAM backup power
source on the MVME172P4. The factory configuration uses
5V standby voltage as the primary and secondary power
source (the onboard battery is disconnected). Verify that this
configuration is appropriate for your application.
8. The EPROM size select header, J23, should be jumpered between
pins 2-3. This sets it up for a 4Mbit x 8 EPROM density, the factory
default.
9. Header J24 defines the state of Flash memory write protection. The
factory configuration has the jumper installed, allowing writes to
Flash. Verify that this setting is appropriate for your application.
10. Verify that the settings of configuration switches S3 (MC2 DRAM
size), S5 (IP DMA snoop control, IP Reset mode, and Flash Write
Enable mode), and S6 (MCECC DRAM size) are appropriate for
your memory controller emulation.
11. Refer to the setup procedure for your particular chassis or system for
details concerning the installation of the MVME172P4.
12. Connect the terminal to be used as the 172Bug system console to the
default EIA-232-D port at Serial Port 1 on the front panel of the
MVME172P4, or Serial Port 2 on the MVME712x series transition
module. (For other connection options, refer to
Serial Connections
in Chapter 1.) Set the terminal up as follows:
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