Preparing the Board
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The next five tables show the address range for each EPROM socket in all
five configurations. GPI3 (S4, switch segment 5) is a control bit in the
MC2 General-Purpose Inputs register in the Petra ASIC that determines
whether reset code is fetched from Flash memory or from EPROMs. (For
particulars on GPI3, refer to the Programmer’s Reference Guide.)
Table 1-3. EPROM/Flash Mapping — 128K x 8 EPROMs
GPI3
Address Range
Device Accessed
Set to OFF
1
$FF800000 - $FF81FFFF
EPROM A (XU1)
$FF820000 - $FF83FFFF
EPROM B (XU2)
$FFA00000 - $FFBFFFFF
Onboard Flash
Set to ON
0
$FF800000 - $FF9FFFFF
Onboard Flash
$FFA00000 - $FFA1FFFF
EPROM A (XU1)
$FFA20000 - $FFA3FFFF
EPROM B (XU2)
Table 1-4. EPROM/Flash Mapping — 256K x 8 EPROMs
GPI3
Address Range
Device Accessed
Set to OFF
1
$FF800000 - $FF83FFFF
EPROM A (XU1)
$FF840000 - $FF87FFFF
EPROM B (XU2)
$FFA00000 - $FFBFFFFF
Onboard Flash
Set to ON
0
$FF800000 - $FF9FFFFF
Onboard Flash
$FFA00000 - $FFA3FFFF
EPROM A (XU1)
$FFA40000 - $FFA7FFFF
EPROM B (XU2)
Содержание MVME162P-242
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