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MPC8240 Integrated Processor User’s Manual
Detailed Signal Descriptions
2.2.1.6.2 Device Select (DEVSEL)—Input
Following is the state meaning for DEVSEL as an input signal.
State Meaning
Asserted—Indicates that some PCI target (other than the MPC8240)
has decoded its address as the target of the current access. This is
useful to the MPC8240 when it is the initiator of a PCI transaction.
Negated—Indicates that no PCI target has been selected.
2.2.1.7 Frame (FRAME)
The frame (FRAME) signal is both an input and output on the MPC8240.
2.2.1.7.1 Frame (FRAME)—Output
Following is the state meaning for FRAME as an output.
State Meaning
Asserted—Indicates that the MPC8240, acting as a PCI master, is
initiating a bus transaction. While FRAME is asserted, data transfers
may continue.
Negated—If IRDY is asserted, indicates that the PCI transaction is
in the final data phase. If IRDY is negated, it indicates that the PCI
bus is idle.
2.2.1.7.2 Frame (FRAME)—Input
Following is the state meaning for FRAME as an input signal.
State Meaning
Asserted—Indicates that another PCI master is initiating a bus
transaction and causes the MPC8240 to decode the address and the
command signals to see if it is the target of the transaction.
Negated—Indicates that the transaction is in the final data phase or
that the bus is idle.
2.2.1.8 Initiator Ready (IRDY)
The initiator ready (IRDY) signal is both an input and output on the MPC8240.
2.2.1.8.1 Initiator Ready (IRDY)—Output
Following is the state meaning for IRDY as an output.
State Meaning
Asserted—Indicates that the MPC8240, acting as a PCI master, can
complete the current data phase of a PCI transaction. During a write,
the MPC8240 asserts IRDY to indicate that valid data is present on
AD[31:0]. During a read, the MPC8240 asserts IRDY to indicate that
it is prepared to accept data.
Negated—Indicates that the PCI target needs to wait before the
MPC8240, acting as a PCI master, can complete the current data
phase. During a write, the MPC8240 negates IRDY to insert a wait
Содержание MPC8240
Страница 1: ...MPC8240UM D Rev 1 1 2001 MPC8240 Integrated Processor User s Manual ...
Страница 38: ...xviii MPC8240 Integrated Processor User s Manual TABLES Table Number Title Page Number ...
Страница 48: ...xlviii MPC8240 Integrated Processor User s Manual Acronyms and Abbreviations ...
Страница 312: ...6 94 MPC8240 Integrated Processor User s Manual ROM Flash Interface Operation ...
Страница 348: ...7 36 MPC8240 Integrated Processor User s Manual PCI Host and Agent Modes ...
Страница 372: ...8 24 MPC8240 Integrated Processor User s Manual DMA Register Descriptions ...
Страница 394: ...9 22 MPC8240 Integrated Processor User s Manual I2O Interface ...
Страница 412: ...10 18 MPC8240 Integrated Processor User s Manual Programming Guidelines ...
Страница 454: ...12 14 MPC8240 Integrated Processor User s Manual Internal Arbitration ...
Страница 466: ...13 12 MPC8240 Integrated Processor User s Manual Exception Latencies ...
Страница 516: ...16 14 Watchpoint Trigger Applications ...
Страница 538: ...B 16 MPC8240 Integrated Processor User s Manual Setting the Endian Mode of Operation ...
Страница 546: ...C 8 MPC8240 Integrated Processor User s Manual ...
Страница 640: ...INDEX Index 16 MPC8240 Integrated Processor User s Manual ...