Motorola MPC8240, Руководство пользователя, Страница: 390 / 642

9-18 MPC8240 Integrated Processor User’s Manual
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O Interface
9.3.4.2.7 Outbound Free_FIFO Head Pointer Register (OFHPR)
PCI masters return free MFAs to the inbound free_list FIFO pointed to by the inbound
free_FIFO head pointer register (IFHPR). The actual PCI writes of MFAs are performed
through the outbound FIFO queue port register (OFQPR). The MPC8240 automatically
increments the OFTP value after every read from OFQPR. Figure 9-15 shows the bits of the
OFHPR.
Figure 9-15. Outbound Free_FIFO Head Pointer Register (OFHPR)
Table 9-19 shows the bit settings for the OFHPR.
9.3.4.2.8 Outbound Free_FIFO Tail Pointer Register (OFTPR)
The processor picks up free MFAs from the outbound free_list FIFO pointed to by the
outbound free_FIFO tail pointer register (OFTPR). The processor core is responsible for
updating the contents of OFTPR. Figure 9-16 shows the bits of the OFTPR.
Figure 9-16. Outbound Free_FIFO Tail Pointer Register (OFTPR)
Table 9-19. OFHPR Field Descriptions—Offset 0x0_0140
Bits Name
Reset
Value
R/W Description
31–20 QBA All 0s R Queue base address. When read, this field returns the contents of QBAR[31–20].
19–2 OFHP All 0s RW Outbound free_FIFO head pointer. Maintains the local memory offset of the head
pointer of the outbound free_list FIFO.
1–0 — 0 R Reserved
QBA OFHP 0 0
31 20 19 2 1 0
Reserved
QBA OFTP 0 0
31 20 19 2 1 0
Reserved