Motorola MPC8240, Руководство пользователя

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Chapter 2. Signal Descriptions and Clocking 2-1
Chapter 2
Signal Descriptions and Clocking
This chapter provides descriptions of the MPC8240’s external signals. It describes each
signal’s behavior when the signal is asserted and negated and when the signal is an input or
an output.
NOTE:
A bar over a signal name indicates that the signal is active
low—for example, AS (address strobe). Active-low signals are
referred to as asserted (active) when they are low and negated
when they are high. Signals that are not active low, such as
NMI (nonmaskable interrupt), are referred to as asserted when
they are high and negated when they are low.
Internal signals are depicted as lower case and in italics. For
example, sys_logic_clk is an internal signal. These are
referenced only as necessary for understanding of the external
functionality of the device.
The chapter is organized into the following sections:
• Overview of signals and complete cross-reference for signals that serve multiple
functions. Includes listing of output signal states at reset.
• Signal description section that provides a detailed description of each signal, listed
by functional block
• A complete section on the operation of the many input and output clock signals on
the MPC8240, and the interactions between these signals
• A listing of the reset configuration signals and the modes they define
2.1 Signal Overview
The MPC8240’s signals are grouped as follows:
• PCI interface signals
• Memory interface signals
• EPIC control signals
• I
2
C interface signals