Motorola MPC8240, Руководство пользователя

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15-22 MPC8240 Integrated Processor User’s Manual
JTAG/Testing Support
15.6.2 JTAG Registers and Scan Chains
The bypass, boundary-scan, and instruction JTAG registers and their associated scan chains
are implemented by the MPC8240. These registers are mandatory for compliance with the
IEEE 1149.1 specification.
15.6.2.1 Bypass Register
The bypass register is a single-stage register used to bypass the boundary-scan latches of
the MPC8240 during board-level boundary-scan operations involving components other
than the MPC8240. The use of the bypass register reduces the total scan string size of the
boundary-scan test.
15.6.2.2 Boundary-Scan Registers
The JTAG interface provides a chain of registers dedicated to boundary-scan operations. To
be JTAG-compliant, these registers cannot be shared with any functional registers of the
MPC8240. The boundary-scan register chain includes registers controlling the direction of
the input/output drivers in addition to the registers reflecting the signal value received or
driven.
The boundary-scan registers capture the input or output state of the MPC8240’s signals
during a Capture_DR TAP controller state. When a data scan is initiated following the
Capture_DR state, the sampled values are shifted out through the TDO while new
boundary-scan register values are shifted in through the TDI. At the end of the data scan
operation, the boundary-scan registers are updated with the new values during an
Update_DR TAP controller state.
15.6.2.3 Instruction Register
The 8-bit JTAG instruction register serves as an instruction and status register. As TAP
controller instructions are scanned in through the TDI input, the TAP controller status bits
are scanned out through the TDO output.
15.6.2.4 TAP Controller
The MPC8240 provides a standard JTAG TAP controller that controls instruction and data
scan operations. The TMS signal controls the state transitions of the TAP controller.