Motorola MC68360, Руководство пользователя

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MOTOROLA MC68360 USER’S MANUAL ERRATA 19
Also in the same table on page 10-11, specification 49 duplicates specification 58 and
should be removed.
Also on the same table spec 12 should not have a superscript of 12.
6. Missing Specification.
On page 10-11, Table 10.9, the following specification should be added:
7. Error on note.
On page 10-12, Note 10 and 11 indicated that RASx and RASxDD may be tied together.
This is not true. Signals RASx and RASxDD should not be tied together since it will cause
contention on the signal pins upon boot.
10. These CSx specs are for TRLX=0.
11. These CSx specs are for TRLX=1.
8. Clarification on specification.
On page 10-28, Table 10-10 specification 103 was not clear. The following clarification takes
into account page and no-page mode as well as WBTQ modes.
9. Typo on R/W Low to CASx Asserted.
On page 10-28, Table 10.10 specification 115 was printed incorrectly. The correct spec is
as follows:
20 CLKO1 High to R/W Low tCHRL 3 20 3 15 ns
20A CASx Low to R/W Low (Only in page mode and when the
load capacitance is the same on CAS and R/W Pin)
tCARL 0 — 0 — ns
23 CLKO1 High to Data-Out Valid tCHDO — 23 — 18 ns
23A CLKO1 High to parity Valid t
CHPV
— 25 — 20 ns
Num. Characteristic Symbol
3.3 V/5.0 V 5.0V
Unit 25.0 MHz 33.34MHz
Min Max Min Max
58B CLKO1 high to BERR, RESETS, RESETH tri-stated — 20 — 15 ns
Num. Characteristic
3.3 V or 5.0 V 5.0V
Unit 25.0 MHz 33.34MHz
Min Max Min Max
103A RASx Width Negated (Back to Back Cycles)
Non page mode @WBTQ=0 75
56.25
ns
103B RASx Width Negated (Back to Back Cycles)
Page mode @WBTQ=0 55
41.25
ns
103C RASx Width Negated (Back to Back Cycles)
Non page mode @WBTQ=1
115
86.25
ns
103D RASx Width Negated (Back to Back Cycles)
Non page mode @WBTQ=1
95
69.23
ns
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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