www.miinet.com
Moore Industries-International, Inc.
- 69 -
User’s Manual
225-748-01L
February 2017
www.miinet.com
READY INPUT
TRIP 1 TRIP 2 FAULT
SELECT
DOWN
UP
COM
STA
SAFETY
TRIP
ALARM
TAG
126.39
DEG C
NC1
CM1
NO1
NC2
CM2
NO2
NC3
CM3
NO3
Final Element
Process
Trip 1
Process
Trip 2
Fault
Alarm
Programmable Current/Voltage Safety Trip Alarm
STA
HLPRG
SEC
TION 8
Section 8 - Applications
The following are examples of typical STA configurations.
High Integrity Alarm Trip
The configuration shown in Figure 8.1. offers the highest trip integrity. Since the trip and fault
relays are wired in series, any trip alarm or STA fault will trip the final element or logic solver.
However this configuration is vulnerable to spurious trips as STA safe failures will also trip the
final element.
Figure 8.1.
High Integrity Alarm Trip example
High Availability Architecture
The configuration shown in Figure 8.2. offers higher system availability. The Fault alarm is wired
separately to inform the safety system that there is a fault alarm and that this component’s ability
to carry out its portion of Safety Instrumented Function cannot be performed. This configuration
can be used in applications where it is safe to keep the process running for a short time while
a defective instrument is repaired, however this configuration will NOT trip if an STA fault is
diagnosed.
This type of configuration must be used with care in a safety system. The end user must
determine how long the process is allowed to continue after a STA fault is detected and ensure
that the unit can be repaired or replaced within this time.
Figure 8.2.
High Availability Alarm Trip example
NC1
CM1
NO1
NC2
CM2
NO2
NC3
CM3
NO3
SELECT
DOWN
UP
COM
READY INPUT
TRIP 1 TRIP 2 FAULT
17.29
MA
STA
SAFETY
TRIP
ALARM
TAG
Process
Trip 1
Fault
Alarm
Process
Trip 2
Logic Solver/
SIF Alarm
Final Element