App
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Appendix 5 Method of replacing High Performance model QCPU with Universal model QCPU
APPENDICES
Example 2) Not detecting an OPERATION ERROR (error code: 4140) in the
ANDE instruction
[Ladder mode] [List mode]
In the ladder block starting from the step 104, the ANDE<= instruction of the step 105
shall not be executed when the M101 (valid data flag) is OFF.
The ANDE<= instruction of the step 105 is not executed when the M101 is OFF in the
LD instruction of the step 104 in the program above. Therefore, when the M101 is
OFF, an OPERATION ERROR (error code: 4140) is not detected even if a "special
value" is stored in D100.
Example 3) Detecting an OPERATION ERROR (error code: 4140) in the ANDE
instruction
[Ladder mode] [List mode]
In the ladder block starting from the step 104, the ANDE<= instruction of the step 106
and the OR>= instruction of the step 110 shall not be executed when the M101 (valid
data flag) is OFF.
However, if the M90 is ON in the LD instruction of the step 105, the ANDE<=
instruction of the step 106 is executed. Therefore, even when the M101 is OFF, an
OPERATION ERROR (error code: 4140) is detected in the ANDE<= instruction of the
step 106 if the M90 is ON and a "special value" is stored in D100.
Method of avoiding an OPERATION ERROR occurrence is described in (2).
Содержание Q00CPU
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