2
PERFORMANCE SPECIFICATION
2.3 Process CPU
2
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O
verv
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Per
fo
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p
ecifica
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Co
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xecut
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I/O N
unb
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Assig
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m
e
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5
Me
mor
ie
s a
nd
File
s
Ha
nd
led
by CP
U Mo
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6
Func
tions
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Co
mmu
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a
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us
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bu
ilt
-i
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t po
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CP
U mod
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Co
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ith
Int
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Fun
ction
Mo
du
le
*4
: Extended by the upgraded functions of CPU module (
*5
: The CPU module can execute up to 124 programs. The CPU module cannot execute 125 or more programs.
*6
: The number of points can be changed within the setting range. (
Table2.3 Performance Specifications
Item
Process CPU
Q02PHCPU
Q06PHCPU
Q12PHCPU
Q25PHCPU
Max. number
of files stored
Program memory
28
60
124
252
*5
Memory card (RAM)
287(When the Q2MEM-2MBS is used)
Memory card
(ROM)
Flash card
288
ATA card
512
Standard RAM
3
*4
Standard ROM
28
60
124
252
No. of times of writing data into the standard
ROM
Max. 100000 times
No. of I/O device points
(No. of points usable on program)
8192 points (X/Y0 to 1FFF)
No. of I/O points (No. of points accessible to the
actual I/O module)
4096 points (X/Y0 to FFF)
N
o. of device point
s
Internal relay [M]
*6
8192 points by default (M0 to 8191) (changeable)
Latch relay [L]
*6
8192 points by default (L0 to 8191) (changeable)
Link relay [B]
*6
8192 points by default (B0 to 1FFF) (changeable)
Timer [T]
*6
2048 points by default (T0 to 2047) (sharing of low- and high-speed timers) (changeable)
The low- and high-speed timers are specified by the instructions.
The measurement unit of the low- and high-speed timers is set up by parameters.
(Low-speed timer: 1 to 1000ms, 1ms unit, 100ms by default)
(High-speed timer: 0.1 to 100ms, 0.1ms unit, 10ms by default)
Retentive timer [ST]
*6
0 point by default (sharing of low- and high-speed retentive timers) (changeable)
The low- and high-speed retentive timers are specified by the instructions.
The measurement unit of the low- and high-speed retentive timers is set up by
parameters.
(Low-speed retentive timer: 1 to 1000ms, 1ms unit, 100ms by default)
(High-speed retentive timer: 0.1 to 100ms, 0.1ms unit, 10ms by default)
Counter [C]
*6
• Normal counter, 1024 points by default (C0 to 1023) (changeable)
• Interrupt counter: 256 points max. (0 point by default, setting by parameters)
Data register [D]
*6
12288 points by default (D0 to 12287) (changeable)
Link register [W]
*6
8192 points by default (W0 to 1FFF) (changeable)
Annunciator [F]
*6
2048 points by default (F0 to 2047) (changeable)
Edge relay [V]
*6
2048 points by default (V0 to 2047) (changeable)
Содержание Q00CPU
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