App
- 75
Appendix 2 Special Register List
APPENDICES
ACPU
Special
Register
Special
Register
after
Conversion
Special
Register for
Modification
Name
Meaning
Details
Corresponding
CPU
D9009
SD1009
SD62
Annunciator
detection
F number at which
external failure has
occurred
• When one of F0 to 2047 is turned on by
or
, the F number, which has been detected earliest among
the F numbers which have turned on, is stored in BIN code.
• SD62 can be cleared by
or
instruction.
If another F number has been detected, the clearing of SD62
causes the next number to be stored in SD62.
Qn(H)
QnPH
Q2AS
Q2A
• When one of F0 to 2047 is turned on by
or
, the
F number, which has been detected earliest among the F numbers
which have turned on, is stored in BIN code.
• SD62 can be cleared by executing
or
instruction or moving INDICATOR RESET switch on CPU module
front to ON position.
If another F number has been detected, clearing of SD62 stores
the next F number into SD62.
Q3A
Q4A
Q4AR
D9010
SD1010
Error step
Step number at which
operation error has
occurred.
• When operation error has occurred during execution of application
instruction, the step number, at which the error has occurred, is
stored in BIN code.
Thereafter, each time operation error occurs, the contents of
SD1010 are renewed.
Qn(H)
QnPH
D9011
SD1011
Error step
Step number at which
operation error has
occurred.
• When operation error has occurred during execution of application
instruction, the step number, at which the error has occurred, is
stored in BIN code. Since the step number is stored into SD1011
when SM1011 turns from OFF to ON, the data of SD1011 is not
updated unless SM1011 is cleared by a user program.
D9014
SD1014
I/O control
mode
I/O control mode
number
• The I/O control mode set is returned in any of the following
numbers:
0: Both input and output in direct mode
1: Input in refresh mode, output in direct mode
3: Both input and output in refresh mode
D9015
SD1015
SD203
Operating
status of CPU
Operating status of
CPU
• The operation status of CPU as shown below are stored in SD203.
*1: When the CPU mdoule is in RUN mode and SM1040 is off, the
CPU module remains in RUN mode if changed to PAUSE mode.
QnA
Qn(H)
QnPH
OUT F
SET F
RST F
LEDR
OUT F
SET F
RST F
LEDR
b15
b12
to
b11
b8
to
b7
b4
to
b3
b0
to
0
1
2
RUN
PAUSE
STOP
Remote RUN/STOP
by parameter setting
0
1
2
RUN
PAUSE
STOP
Remote RUN/STOP
by computer
0
1
2
RUN
PAUSE
3
STEP RUN
STOP
CPU key switch
0
1
Except below
Instruction
execution
Status in program
Remains the same in
remote RUN/STOP
mode.
STOP
1
1
1
Содержание Q00CPU
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