Mitsubishi MELSEC iQ-F, Руководство пользователя

Страница: 138 / 182

136
APPX
Appendix 4 Buffer Memory Areas
Input signal error/Disconnection detection automatic clear enable/disable setting
Set whether to enable or disable auto-clear of input signal error or disconnection detection with the input signal error detection
function or disconnection detection function.
Setting a value other than in the table above results in operation with Disable (1).
■
Buffer memory address
The following shows the buffer memory address of this area.
■
Enabling the setting
Turn off → on → off 'Operating condition setting request' (Un\G70, b9) to enable the setting.
■ Default value
The default value is Disable (1) for all the channels.
Offset/gain writing enable code
When the offset/gain initialization request (Un/G70, b5) turns off
→
on by setting the enable code "E20FH" in this area at the
time of initialization of offset/gain, the offset value and the gain value in the flash memory of the multiple input module are
initialized.
When setting anything other than "E20FH" in this area, initialization is not executed.
■
Buffer memory address
The following shows the buffer memory address of this area.
■ Default value
The default value is set to 0.
CH1 Digital output value
The converted digital output value is stored in 16-bit signed binary value.
■ Buffer memory address
The following shows the buffer memory address of this area.
■
Refreshing cycle
The value is updated every conversion cycle.
Setting value Description
0 Enable
1 Disable
Buffer memory name CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8
Input signal error/Disconnection detection automatic clear
enable/disable setting 304
Input signal error/disconnection detection auto-clear enable/
disable setting (in FX2N allocation mode function) 133
Buffer memory name CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8
Offset/gain writing enable code 305
Offset/gain initialization enable code (In FX2N allocation mode
function) 1340
(1) Data section
(2) Sign bit 0: Positive, 1: Negative
Buffer memory name CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8
CH  Digital output value 400 600 800 1000 1200 1400 1600 1800
CH  Digital output value (in FX2N allocation mode function) 1001 1003 1005 1007 1009 1011 1013 1015
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b0 b1 b2 b3 b4
(1) (2)