509
FX
3G
/FX
3U
/FX
3UC
Series Programmable Controllers
Programming Manual - Basic & Applied Instruction Edition
18 Floating Point – FNC110 to FNC139
18.11 FNC123 – EDIV / Floating Point Division
11
FN
C30
-FN
C3
9
R
ota
tion and
Shi
ft
12
FN
C40-FN
C49
D
ata O
perati
on
13
FNC
50-FNC
59
High-Speed
Proc
essing
14
FM
C60-FN
C69
H
andy
In
struction
15
FN
C70-FN
C79
E
xternal
F
X
I/O
De
vice
16
FNC
80-FNC
89
External
FX
Dev
ice
17
FNC1
00-
FNC10
9
Dat
a
Transfer 2
18
FNC1
10-
FNC139
Fl
oa
ting Poi
nt
19
FNC14
0-F
N
C
149
Da
ta
Operation 2
20
FNC1
50-
FNC159
Pos
itioning
Control
18.11 FNC123 – EDIV / Floating Point Division
Outline
This instruction executes division of two binary floating point.
→
For program examples of floating point operations, refer to Section 12.10.
→
For handling of floating point, refer to Subsection 5.1.3.
→
For flag operations, refer to Subsection 6.5.2.
1. Instruction format
2. Set data
*1.
When a constant (K or H) is specified, it is automatically converted into binary floating point (real number)
when the instruction is executed.
3. Applicable devices
S
: This function is supported only in FX
3U
/FX
3UC
PLCs.
Explanation of function and operation
1. 32-bit operation (DEDIV and DESDIVP)
Binary floating point data [
+1,
] is divided by binary floating point data [
+1,
], and the division
result in the binary floating point format is transferred to [
+1,
].
When a constant (K or H) is specified as [
+1,
] or [
+1,
], it is automatically converted into
binary floating point.
Operand Type
Description
Data Type
Word device number storing binary floating point data used in division
Real number (binary)
*1
Word device number storing binary floating point data used in division
Data register number storing binary floating point data obtained by division
Oper-
and
Type
Bit Devices
Word Devices
Others
System User
Digit Specification
System User
Special
Unit
Index
Con-
stant
Real
Number
Charac-
ter String
Pointer
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modify K H
E
"
"
P
3 3
S
3
3 3
3
3 3
S
3
3 3
3
3 3
S
3
P
FNC 123
EDIV
D
−
Mnemonic
Operation Condition
16-bit Instruction
DEDIV
DEDIVP
Mnemonic
Operation Condition
32-bit Instruction
13 steps
Continuous
Operation
Pulse (Single)
Operation
S
1
S
2
D
S
1
S
2
D
S
1
S
1
S
2
S
2
D
D
Command
input
FNC123
DEDIV
S
1
S
2
D
[ +1, ]
÷
[ +1, ]
→
[ +1, ]
Binary floating point
Binary floating point
Binary floating point
S
1
S
1
S
2
S
2
D
D
Dividend
Divisor
S
1
S
1
S
2
S
2
Command
input
FNC123
DEDIV
K100
S
1
D
[ +1, ]
÷
[ K100 ]
→
[ +1, ]
Binary floating point
Automatically
converted into binary
floating point
Binary floating point
S
1
S
1
D
D
Dividend
Divisor
Содержание FX3G SERIES
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