MIKROTRON GmbH / EoSens 3CL
/
CAMMC301x-RG / 2020
3-21
ASCII commands instruction set
CameraLink output mode
3.4.1 CameraLink output mode
NOTE
In mode 6 the pixel clock value 50
hex
is invalid. In mode
5 the pixel clock values 28
hex
and 2d
hex
are invalid (see
next page).
Possible modes are:
Command
:M<x>
Parameter:<x> = 5,6 (see table above)
Response:ACK / NAK (if :A is set to Y)
Command
:
M?
Response:<x> = actual value
3.4.2 Set pixel clock
This command allows to set the pixel clock frequency of the Camera
-
Link interface. Except in mode no. 6 (75 MHz), the pixel clock values
are preset to 80 MHz. These default frequencies get the highest
possible speed out of the camera.
Info
Note that a reduced pixel clock value reduces the maximal frame
rate. Check the reduction with the frame rate command :q?
In case the frame grabber does not accept these pixel clock values
or a long cable (especially a low quality cable) is used, the pixel clock
value has to be reduced. It can be adjusted in steps of 5 MHz within
the range of 40 to 80 MHz.
Command
:R<xx>
Parameter:3c
hex
, 41
hex
,
46
hex
, 4b
hex
, 50
hex
Response:ACK / NAK (if :A is set to Y)
No.
Taps x bits
CL mode
Pixel clock
Remark
5
8 x 8
FULL
80 MHz
6
10 x 8
FULL
75 MHz