the RX_SAFE_MODE bit in the TRX_CTRL_2 register (TRX_CTRL_2.RX_SAFE_MODE) set. The receiver remains
in RX_ON or RX_AACK_ON state until the whole frame is uploaded by the microcontroller, indicated by pin 23 (/SEL)
= H during the SPI Frame Receive Mode. The Frame Buffer content is only protected if the FCS is valid.
A Static Frame Buffer Protection is enabled with the RX_PDT_DIS bit in the RX_SYN register
(RX_SYN.RX_PDT_DIS) set. The receiver remains in RX_ON or RX_AACK_ON state and no further SHR is
detected until the register bit RX_PDT_DIS is set back.
7.3
Transmitter (TX)
7.3.1
Overview
The AT86RF212B transmitter utilizes a direct up-conversion topology. The digital transmitter (TX BBP) generates
the in-phase (I) and quadrature (Q) component of the modulation signal. A Digital-to-Analog converter (DAC) forms
the analog modulation signal. A quadrature mixer pair converts the analog modulation signal to the RF domain. The
Power Amplifier (PA) provides signal power delivered to the differential antenna pins (RFP, RFN). Both, the LNA of
the receiver input and the PA of the transmitter output are internally connected to the bidirectional differential antenna
pins so that no external antenna switch is needed.
Using the default settings, the PA incorporates an equalizer to improve its linearity. The enhanced linearity keeps the
spectral side lobes of the transmit spectrum low in order to meet the requirements of the European 868.3MHz band.
If the PA Boost mode is turned on, the equalizer is disabled. This allows delivery of a higher transmit power of up to
+9 dBm at the cost of higher spectral side lobes and higher harmonic power.
In Basic Operating Mode, a transmission is started from PLL_ON state by either writing TX_START to the TRX_CMD
bits in the TRX_STATE regoster (TRX_STATE.TRX_CMD) or by a rising edge of pin 11 (SLP_TR).
In Extended Operating modes, a transmission might be started automatically depending on the transaction phase of
either RX_AACK or TX_ARET.
7.3.2
Frame Transmit Procedure
The frame transmit procedure, including writing PSDU data into the Frame Buffer and initiating a transmission, is
described in the
Radio Transceiver Usage - Frame Transmit Procedure
section.
7.3.3
TX Output Power
The maximum output power of the transmitter is typ3.2 dBm in normal mode and +8.7 dBm in boost mode.
The TX output power can be set via the TX_PWR bits in the PHY_TX_PWR register (PHY_TX_PWR.TX_PWR). The
output power of the transmitter can be controlled down to -27 dBm with 1 dB resolution.
To meet the spectral requirements of the European and Chinese bands, it is necessary to limit the TX power by
appropriate setting of the TX_PWR and GC_PA bits in the PHY_TX_PWR register (PHY_TX_PWR.TX_PWR and
PHY_TX_PWR.GC_PA), and the GC_TX_OFFS bits in the RF_CTRL_0 register (RF_CTRL_0.GC_TX_OFFS).
7.3.4
TX Power Ramping
To optimize the output Power Spectral Density (PSD), individual transmitter blocks are enabled sequentially. A
transmit action is started by either the rising edge of pin 11 (SLP_TR) or by writing TX_START command to the
TRX_CMD bits in the TRX_STATE register (TRX_STATE.TRX_CMD). One symbol period later the data transmission
begins. During this time period, the PLL settles to the frequency used for transmission. The PA is enabled
prior to the data transmission start. This PA lead time can be adjusted with the PA_LT bits in the RF_CTRL_0
register (RF_CTRL_0.PA_LT). The PA is always enabled at the lowest gain value corresponding to GC_PA = 0.
Then the PA gain is increased automatically to the value set by the GC_PA bits in the PHY_TX_PWR register
(PHY_TX_PWR.GC_PA). After transmission is completed, TX power ramping down is performed in an inverse order.
The control signals associated with TX power ramping are shown in the figure below. In this example, the
transmission is initiated with the rising edge of pin 11 (SLP_TR). The radio transceiver state changes from PLL_ON
to BUSY_TX.
ATSAMR30M18A
Module Description
©
2018-2021 Microchip Technology Inc.
and its subsidiaries
Datasheet
DS70005384B-page 21
