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Register Description
IF2008/PCIe / IF2008E
10.20 Parity Enable Register
Base addr. + 36h (write access)
Bit
Function
0
0 = Parity bit for sensor channel 1 disabled
1 = Parity bit for sensor channel 1 enabled (only even parity)
1
0 = Parity bit for sensor channel 2 disabled
1 = Parity bit for sensor channel 2 enabled (only even parity)
2
0 = Parity bit for sensor channel 3 disabled
1 = Parity bit for sensor channel 3 enabled (only even parity)
3
0 = Parity bit for sensor channel 4 disabled
1 = Parity bit for sensor channel 4 enabled (only even parity)
4
0 = Parity bit for sensor channel 5 disabled
1 = Parity bit for sensor channel 5 enabled (only even parity)
5
0 = Parity bit for sensor channel 6 disabled
1 = Parity bit for sensor channel 6 enabled (only even parity)
6-15
Reserved
Fig. 43: Parity enable register
10.21 Parity-Error-Register
Base addr. + 36h (write access)
Bit
Function
0
1 = Parity-Error sensor channel 1
1
1 = Parity-Error sensor channel 2
2
1 = Parity-Error sensor channel 3
3
1 = Parity-Error sensor channel 4
4
1 = Parity-Error sensor channel 5
5
1 = Parity-Error sensor channel 6
6 – 15
reserviert
Fig. 44: Parity error register
Содержание IF2008/PCIe
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