Micrel
MICRF506BML/YML
Modulator
A6..A0 D7
D6
D5 D4
D3
D2
D1
D0
0000100 Mod_F2
Mod_F1 Mod_F0 Mod_I4 Mod_I3 Mod_I2 Mod_I1 Mod_I0
0000101 -
-
‘0’ ‘1’ Mod_A3 Mod_A2 Mod_A1 Mod_A0
0000110 - Mod_clkS2
Mod_clkS1
Mod_clkS0 BitSync_clkS2 BitSync_clkS1 BitSync_clkS0 BitRate_clkS2
0000111 BitRate_clkS1 BitRate_clkS0 RefClk_K5 RefClk_K4 RefClk_K3 RefClk_K2 RefClk_K1 RefClk_K0
The modulator will create a waveform with
programmable amplitude and frequency. This
waveform is fed into a modulation varactor in the
VCO, which will create the desired frequency
modulation. The frequency spectrum can be
narrowed by increasing the rise-and fall times of the
waveform.
The modulator waveform is created by charging and
discharging a capacitor. A modulator clock controls
the timing, as shown in Figure19. For every rise-and
fall edge, 4 clock periods are being used. The
charging current during these 4 clock periods are not
equal, this is to reduce the high frequency
components in the waveform, which in turn will
narrow the frequency spectrum.
The frequency deviation can be set in three different
ways, as will be explained below. A formula for
setting the desired deviation is given at the end of
this chapter.
Modulator Clock
Modulator Waveform
Figure 19. Modulator Waveform and Clock
Modulator Clock
The modulator clock frequency is set by:
)
(7
XCO
MPOD_CLK
2
Refclk_K
f
f
Mod_clkS
−
×
=
where f
MOD_CLK
is the modulator clock shown in
Figure 19, f
XCO
is the crystal oscillator frequency
Refclk_K is a 6 bit number and Mod_clkS is a 3 bit
number. Mod_clkS can be set to a value between 0
and 7. The modulator clock frequency should be set
according to the bit rate and shaping.
Mod_clka
Mod_clkb
Mod_clkb > Mod_clka
Figure 20. Two Different Modulator Clock Setting
A f
MOD_CLK
of 8 times the bit rate (as in Figure 20)
corresponds to a signal filtered in a Gaussian filter
with a Bandwidth Period product (BT) of 1. When BT
is increased, the waveform will be less filtered.
Minimum BT is 1 (f
MOD_CLK
is 8 times the bitrate).
Figure 20 shows two waveforms with BT=1 and
BT=2, i.e. the f
MOD_CLK
is 8 and 16 times higher than
the bit rate. When changing the BT factor, the
charge-and discharge times will also be changed,
and therefore the frequency deviation, as shown in
Figure 19.
Modulator Current
The current used during the rise- and fall times can
be programmed with the Mod_I4..Mod_I0 bit, the
last one being LSB. Figure 21 shows two waveforms
generated with two different currents, where
. Higher current will give a
higher frequency deviation and vice versa. The
effect of modulator clock and MOD_1 is illustrated
by:
Ib
Mod
Ia
Mod
_
_
>
f
DEVIATION
×
MOD_1
f
MOD_CLK
To avoid saturation in the modulator it is important
not to exceed maximum Mod_I. Maximum Mod_I for
a given fMOD_clk is given by:
MOD_I
MAX
=
INT(f
MOD_CLK
⋅
28
×
10
6
) - 1
where INT() returns the integer part of the argument.
July 2006
26
M9999-092904
+1 408-944-0800