Maxim Integrated MAX32660, Руководство пользователя

Страница: 93 / 195

MAX32660 User Guide
Maxim Integrated Page 93 of 195
UART Interrupt Flags Register UARTn_INT_FL [0x0010]
Bits Name Access Reset Description
3 rx_ovr R/W1C 0
RX FIFO Overrun Interrupt Flag
This field is set if the receive FIFO is full and an additional byte is received resulting in
a FIFO overrun condition. If this field is set at least one byte of received data has
been lost. Write 1 to clear.
0: RX FIFO overrun has not occurred.
1: RX FIFO overrun occurred.
2 cts R/W1C 0
CTS Interrupt Flag
CTS, also referred to as Modem Status Interrupt, flag. Write 1 to clear.
1 parity R/W1C 0
Receive Parity Error Status Flag
Set if a parity error is detected. This flag applies to data received only. Write 1 to
clear.
0: Parity error has not been detected.
1: Parity error detected.
0 frame R/W1C 0
Frame Error Status Flag
Set if a frame error occurs while receiving data. Write 1 to clear.
Table 8-8: UART Rate Integer Register
UART Baud Rate Integer Register UARTn_BAUD0 [0x0014]
Bits Name Access Reset Description
31:17 - R/W 0
Reserved for Future Use
Do not modify this field.
18:16 clkdiv R/W 0
Bit Rate Clock Divisor
This field is used to divide the bit rate clock by the selected Clock Divider value. Refer
to the
UART Bit Rate Calculation s cti n f r tails f t rmining this fi l ’s valu f r
a given UART bit rate.
clkdiv Clock Divider Value
0 128
1 64
2 32
3 16
4 8
5 - 7 Reserved for Future Use
15:12 - R/W 0
Reserved for Future Use
Do not modify this field.
11:0 ibaud R/W 0
Integer Portion of Baud Rate Divisor
This field contains the integer value of the bit rate divisor. Refer to the UART Bit Rate
Calculation section for d tails f t rmining this fi l ’s valu f r a giv n bit
rate.
Table 8-9: UART Baud Rate Decimal Register
UART Baud Rate Decimal Register UARTn_BAUD1 [0x0018]
Bits Name Access Reset Description
31:12 - R/W 0
Reserved for Future Use
Do not modify this field.