LSI LSI53C1000, Техническое руководство

Страница: 322 / 384

6-48 Specifications
Figure 6.27 Normal/Fast Memory (
≥
128 Kbytes) Single Byte Access Read Cycle
Table 6.33 Normal/Fast Memory (
≥
128 Kbytes) Single Byte Access Read Cycle
Symbol Parameter Min Max Unit
t
11
Address setup to MAS/ high 25 – ns
t
12
Address hold from MAS/ high 15 – ns
t
13
MAS/ pulse width 25 – ns
t
14
MCE/ LOW to data clocked in 150 – ns
t
15
Address valid to data clocked in 205 – ns
t
16
MOE/ LOW to data clocked in 100 – ns
t
17
Data hold from address, MOE/, MCE/ change 0 – ns
t
18
Address out from MOE/, MCE/ HIGH 50 – ns
t
19
Data setup to CLK HIGH 5 – ns
CLK
(Driven by System)
Data Driven by Memory)
1 2 3 4 5 6 7 8 9 10
MAD
(Addr driven by LSI53C1000;
High Order
Address
Middle Order
Address
Low Order
Address
MAS1/
(Driven by LSI53C1000)
MAS0/
(Driven by LSI53C1000)
MCE/
(Driven by LSI53C1000)
MOE/
(Driven by LSI53C1000)
MWE/
(Driven by LSI53C1000)
t
13
t
11
t
12
t
15
t
14
t
16