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dc1642af
DEMO MANUAL DC1642A
quick start proceDure
Figure 1. Proper Measurement Equipment Setup
Table 2. DC1642A Connectors and Jumpers
REFERENCE
FUNCTION
J2 (Mode)
Output Format and Clock Duty Stabilizer Pin. Default is V
DD
.
J3 (
SHDN
/OE)
Enables/Disables the ADC. Default is ON.
J4 (Sense)
Reference Input to Adjust the Full-Scale Range of the DC1642A. Default is V
DD
.
J5 (RF)
Board RF Signal Input. Impedance-matched to 50Ω for use with lab signal generators.
J6 (Mixer/Amplifier Enable)
Enables/Disables the RF Mixer and Amplifier. Default is ON.
J7 (CLK)
Board Clock Input. Impedance-matched to 50Ω. Drive with a low-phase-noise clock oscil-lator or filtered sine wave
signal source.
J9 (LO)
Board LO Signal Input. Impedance-matched to 50Ω for use with lab signal generators.
TP1 (External Reference)
Reference Input to Adjust the Full-Scale Range of the LTM9003. Connects to the SENSE pin; by default, tied to V
DD
for
internal reference.
TP2 (GND)
DC Ground.
TP3 (3.3V)
DC Supply Input (3.3VDC).
TP4 (GND)
DC Ground.
TP5 (5V)
DC Supply Input (5VDC).
Signal
Generator
HP 8644B
or Equivalent
BPF *
RF Signal Generator
(HP 8644B) or Other
Low Phase Noise
Clock Source (e.g. DC1216)
BPF
Signal
Generator
HP 8644B
or Equivalent
BPF
Power 5V at 200mA
Power 3.3V at 1A
To FT149+
DC890B
* Note: Even a high-quality signal synthesizer
will still have noise and harmonics that should
be attenuated with a low-pass or band-pass
filter. For good-quality high order filters, see
TTE, Lark Engineering, or equivalent.
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