THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
11/05/31
WOL_CTL
C271
10uF
10V
C232
0.1uF
C221
0.1uF
C239
0.1uF
AVDD_AU33
+3.3V_NORMAL
+3.3V_NORMAL
C235
0.1uF
C216
4.7uF
+1.1V_VDDC
+3.5V_ST
C264
10uF
10V
AVDDL_MOD11
C252
0.1uF
DVDD_DDR11
JP202
C320
0.1uF
OPT
C243
0.1uF
R202
0
DVDD_DDR11
C306
0.1uF
+1.5V_DDR
+1.1V_VDDC_CPU
JP204
AVDD_AU33
R201
1K
OPT
C310
0.1uF
C222
10uF
10V
C219
0.1uF
JP205
C244
0.1uF
C277
0.1uF
JP203
+1.1V_VDDC
VDDC15_M0
C265
0.1uF
AVDD33
AVDD_PLL33
VDDC15_M1
C200
1uF
25V
AVDD5V_MHL
C238
0.1uF
C261
10uF
10V
AVDD33
5V_HDMI_3
C275
0.1uF
C236
10uF
10V
DVDD_NODIE
R200
10
C217
10uF
10V
C256
10uF
10V
AVDDL_MOD11
C202
10uF
10V
AVDD_PLL33
C250
0.1uF
C285
0.1uF
C201
10uF
10V
C220
4.7uF
C302
10uF
10V
VDDC15_M0
VDDC15_M0
C304
0.1uF
AVDDL_HDMI11
C274
0.1uF
VDDP_NAND
+1.1V_VDDC_CPU
C286
0.1uF
AVDD5V_MHL
+1.1V_VDDC
DVDD_DDR11
C203
0.1uF
C224
0.1uF
+3.3V_NORMAL
C263
10uF
10V
C225
0.1uF
C249
0.1uF
AVDD33
+1.8V
VDDC15_M1
C228
10uF
10V
C204
0.1uF
C251
0.1uF
VDDC15_M1
C324
0.1uF
OPT
VDDP_NAND
+3.5V_WOL
C253
0.1uF
OPT
IC200
AP2151WG-7
3
FLG
2
GND
4
EN
1
OUT
5
IN
L227
PZ1608U121-2R0TF
L200
PZ1608U121-2R0TF
L201
PZ1608U121-2R0TF
L202
PZ1608U121-2R0TF
L203
PZ1608U121-2R0TF
L204
PZ1608U121-2R0TF
L212
PZ1608U121-2R0TF
L215
PZ1608U121-2R0TF
L222
PZ1608U121-2R0TF
OPT
L223
PZ1608U121-2R0TF
L226
PZ1608U121-2R0TF
AVDD_3P3
C206
1uF
10V
C205
0.1uF
16V
IC201
AP2121N-3.3TRE1
1
GND
2
VOUT
3
VIN
AVDD_3P3
VDDC15_M1
VDDC15_M0
VDDC15_M0
+3.5V_WOL
AVDD_3P3
C316
10uF
10V
OPT
C226
0.1uF
C317
10uF
10V
C287
0.1uF
C323
10uF
10V
C276
0.1uF
C278
0.1uF
C207
10uF
10V
C209
0.1uF
C218
0.1uF
C208
10uF
10V
C223
10uF
10V
C227
0.47uF
C229
0.47uF
C230
0.47uF
C231
0.47uF
C234
0.47uF
C240
0.47uF
C322
10uF
10V
C314
0.47uF
OPT
C315
0.47uF
OPT
C311
0.47uF
C241
0.47uF
L205
PZ1608U121-2R0TF
C210
0.47uF
AVDDL_HDMI11
R203
10K
OPT
IC100
LGE5331(LM15U)
DEV_SOC
VDDC_1
L10
VDDC_2
L11
VDDC_3
L12
VDDC_4
L13
VDDC_5
L14
VDDC_6
M10
VDDC_7
M11
VDDC_8
M12
VDDC_9
M13
VDDC_10
M14
VDDC_11
N10
VDDC_12
N11
VDDC_13
N12
VDDC_14
N13
VDDC_15
V12
VDDC_16
V13
VDDC_17
V14
VDDC_18
W12
VDDC_19
W13
VDDC_20
W14
VDDC_21
Y12
VDDC_22
Y13
VDDC_23
Y14
VDDC_24
AF18
VDDC_25
AF19
VDDC_26
AF20
VDDC_27
AG18
VDDC_28
AG19
VDDC_29
AG20
VDDC_30
AG21
VDDC_31
AG22
VDDC_32
AH18
VDDC_33
AH19
VDDC_34
AH20
VDDC_35
AH21
VDDC_36
AH22
AVDDL_PREDRV_1
W23
AVDDL_PREDRV_2
Y23
AVDDL_MOD_1
W24
AVDDL_MOD_2
Y24
AVDD15_MOD_1
Y25
AVDD15_MOD_2
Y26
AVDDL_USB3_1
AF14
AVDDL_USB3_2
AF15
VDDC_CPU_1
AA21
VDDC_CPU_2
AA27
VDDC_CPU_3
AA28
VDDC_CPU_4
AA29
VDDC_CPU_5
AB21
VDDC_CPU_6
AB22
VDDC_CPU_7
AB23
VDDC_CPU_8
AB24
VDDC_CPU_9
AB25
VDDC_CPU_10
AB26
VDDC_CPU_11
AB27
VDDC_CPU_12
AB28
VDDC_CPU_13
AB29
VDDC_CPU_14
AC21
VDDC_CPU_15
AC22
VDDC_CPU_16
AC23
VDDC_CPU_17
AC24
VDDC_CPU_18
AC25
VDDC_CPU_19
AC26
VDDC_CPU_20
AC27
VDDC_CPU_21
AC28
VDDC_CPU_22
AC29
VDDC_CPU_23
AC30
VDDC_CPU_24
AD27
VDDC_CPU_25
AD28
VDDC_CPU_26
AD29
VDDC_CPU_27
AD30
DVDD_NODIE
N14
DVDD_DDR_1
R22
DVDD_DDR_2
R24
DVDD_DDR_C
AF24
DVDD_DDR_RX_A
P22
DVDD_DDR_RX_B
T24
DVDD_DDR_RX_C
AF25
AVDD_NODIE
V7
AVDDL_MHL3_1
T13
AVDDL_MHL3_2
T14
AVDD3P3_MHL3_1
L8
AVDD3P3_MHL3_2
M8
AVDD3P3_ETH
W7
AVDD3P3_DADC_1
AD7
AVDD3P3_DADC_2
AD8
AVDD3P3_ADC_1
Y7
AVDD3P3_ADC_2
Y8
AVDD3P3_USB_1
AL10
AVDD3P3_USB_2
AL11
AVDD3P3_USB3_1
AH14
AVDD3P3_USB3_2
AH15
AVDD_AU33
AH7
AVDD_EAR33
AG7
AVDD3P3_DMPLL
AL12
VDDP_1
AK15
VDDP_2
AL15
AVDD_MOD_1
W26
AVDD_MOD_2
Y27
AVDD_LPLL_1
Y28
AVDD_LPLL_2
Y29
AVDD_PLL_A
U18
AVDD_PLL_B
U19
AVDD_PLL_C
AL18
VDDP_3318_A_CAP
L17
VDDP_3318_C_CAP
L15
VDDP_3318_A
G8
VDDP_3318_C
H7
AVDD_DDR_A_CMD_1
M20
AVDD_DDR_A_CMD_2
M21
AVDD_DDR_A_MCK
N21
AVDD_DDR_A_DAT_1
M22
AVDD_DDR_A_DAT_2
N22
AVDD_DDR_A_DAT_3
N23
AVDD_DDR_A_DAT_4
N24
AVDD_DDR_B_CMD_1
N25
AVDD_DDR_B_CMD_2
N26
AVDD_DDR_B_MCK
P25
AVDD_DDR_B_DAT_1
R25
AVDD_DDR_B_DAT_3
T25
AVDD_DDR_B_DAT_4
U25
AVDD_DDR_B_DAT_2
R26
AVDD_DDR_C_CMD_1
AE25
AVDD_DDR_C_CMD_2
AE26
AVDD_DDR_C_MCK
AF26
AVDD_DDR_C_DAT_1
AE22
AVDD_DDR_C_DAT_2
AE23
AVDD_DDR_C_DAT_3
AE24
AVDD_DDR_C_DAT_4
AF22
AVDD_DDR_LDO_A
N20
AVDD_DDR_LDO_B
P24
AVDD_DDR_LDO_C
AD25
AVDD_HDMI_5V_PA
U7
AVDD_HDMI_5V_PC
P7
GND_EFUSE
P8
AVDD_DDR_VBP_A_1
L20
AVDD_DDR_VBP_A_2
L21
AVDD_DDR_VBN_A_1
M24
AVDD_DDR_VBN_A_2
M25
AVDD_DDR_VBP_B_1
U27
AVDD_DDR_VBP_B_2
V27
AVDD_DDR_VBN_B_1
U26
AVDD_DDR_VBN_B_2
V26
AVDD_DDR_VBP_C_1
AD21
AVDD_DDR_VBP_C_2
AD22
AVDD_DDR_VBN_C_1
AD23
AVDD_DDR_VBN_C_2
AD24
C211
0.47uF
C212
20pF
50V
LM15U_DDR_EMI
C213
20pF
50V
LM15U_DDR_EMI
C214
20pF
50V
LM15U_DDR_EMI
LM15U
02
2014-08-26
LM15U POWER
Close to chip side
Close to chip side
Close to chip side
Close to chip side
Close to chip side
2A
Close to chip side
Close to chip side
2A
Close to chip side
Close to chip side
4th layer
4th layer
4th layer
4th layer
4th layer
+3.3V_Bypass Cap
4th layer
+1.1V_Bypass Cap(CLOSE TO CHIP SIDE)
4th layer
GND JIG POINT
4th layer
4th layer
WOL POWER ENABLE CONTROL
1st layer
+1.5V_Bypass Cap
2A
2A
2A
2A
2A
2A
2A
Close to chip side
1st layer
1st layer
Close to chip side
Close to chip side
1st layer
Close to chip side
1st layer
2A
Copyright ⓒ 2015 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Содержание 79UF9500
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