LGE Internal Use Only
Copyright ©2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 15 -
BLOCK DIAGRAM
1. T-project
74L
Mod
ule
I2C
Chip Tuner
B
U
F
_
TS_CLK/ERR/SYN/DATA[0]
LVC541A
Buffer
CI Sl o
FE_TS_DATA[0:7]
CI
MDI[0
]
CI_TS_DATA
[0:7]
CI_Dat
a[0:7]
P
C
M
_
D[0:7]
P
C
M
_
A[8:14]
Serial Flash
For
B
oot
FR
C
LGE7329
(XC5000)
Demod
ulator
(DRC3931)
LVDS
SPI_CK/CS/D0/D1
ot
FE
VMAI
N
CI
_
MDI
[0
:7
]
DDR2 SDRAM
(1GB)
HYNIX
SDDR_D[0:15]
TDDR_D[0:15]
SDDR_A[0:12]
TDDR_A[0:12]
74LCX244
Buffer
P
C
M
_
A[0:7]
CI_ADDR[0:7]
DDR2 SDRAM
(512M
B
)
HYNIX
Mstar
F-
S
C
A
R
T
SC1_CVBS_IN
SC2
C
VBS
IN
_
H-
S
C
A
R
T
SC1_R/G/B
FE
_
VOUT
DT
V/MNT
_
VOUT
NAND Flash
HYNIX
(64M
B
)
P
C
M
_
A[0:7]
EEP
ROM
AT24C512
I2C
Saturn 6
MSD3368
COM
P
O
N
ENT
AV
3
AV_CVBS_IN
COMP_Y/Pb/
Pr
__
Side AV
Dig
ital amp
(NTP
3100L)
I2S
L/
R
RG
B
DSUB_ R/G/B
DSUB_H/VS
Y
N
C
AUDIO IN
(PC)
USB
MP6211DH
USB Power
USB Power
USB
1_DM
/D
P
AUDIO Out
(Head
Phone
)
Audio
AUDIO
Out
(B/T
Headset)
M
A
X3232CDR
DGB_TX/RX
HDMI
1/2/
3
T
M
D
S
3
51P
A
G
R
TM
DS[0:7]
HDMI
CEC
USB
0_DM
/D
P
HDMI 4
Side
RS-
232C
TM
DS[0:7]
HP
D, 5V
_HDMI
Switc
h
SPD
IF
SPDIF_OUT
1/2/
3
Re
ar
:
3
A
_
HPD
5V
_HDMI
Содержание 47SL9000
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