SSI
Leuze electronic GmbH + Co. KG
AMS 348
i
SSI
103
TNT
35/7-2
4V
10
SSI
10.1
Principal functionality of the SSI interface
Data communication of the SSI interface is based on differential transmission as is used for
RS 422 interfaces. The position value is transmitted in sync with a clock cycle (CLOCK) spec
-
ified by the control, starting with the most significant bit (MSB).
In the idle state, both the clock line as well as the data line are at HIGH level. At the first
HIGH-LOW edge (point
1
in Figure 10.1), the data in the internal register is stored. This
ensures that the data are not changed during serial transfer of the value.
When the next clock signal change from LOW to HIGH level (point
2
in Figure 10.1) occurs,
transmission of the position value begins with the most significant bit (MSB). With each
subsequent change of the clock signal from LOW to HIGH level, the next least-significant bit
is transmitted on the data line. After the least significant bit (LSB) has been output, the clock
signal switches from LOW to HIGH for one last time and the data line switches to LOW level
(end of transmission).
A monoflop retriggered by the clock signal determines the time span before the SSI interface
can be called for the next transmission. This results in the minimum pause time between two
successive clock cycles. If time tm = 20µs has elapsed, the data line is returned to the quies
-
cent level (HIGH) (point
3
in Figure 10.1). This signals completed data communication and
that the device is again ready for transmission.
Note!
If the off-cycle of data transmission is interrupted for longer than t
m
= 20µs, the next cycle
will begin with a completely new transmission cycle with a newly calculated value.
If a new transmission cycle is started before time t
m
elapses, the previous value is output
again.
Attention!
The SSI interface can only represent positive distance values. If negative output values are
ascertained due to the offset or counting direction, a zero value is output at the SSI interface!
In the event of a number overflow, all data bits are set to "1".