Evaluating the ORCA ORSO42G5 with the
Lattice Semiconductor
High-Speed SERDES Board
10
Appendix A. Function of the Bias Tee Network
Q: What is the purpose of the bias tee and when is it needed?
The bias tee module is an enhanced DC blocking device that allows application of an external DC bias current to a
device under test. It is commonly used when interfacing a high frequency device DC coupled output device to an
input that does not provide the required DC bias.
Q: Why do the Lattice FPSC 2.5/3.125G SERDES need a bias tee?
The FPSC 2.5/3.125G SERDES high speed outputs are designed to operate into 50
Ω
termination impedance
biased at 1.5V or 1.8V DC. (This is the internal termination provided by Lattice 2.5/3.125G SERDES inputs and
other vendor CML inputs.) Since most oscilloscopes and Digital Communications Analyzers (DCAs) have 50
Ω
input impedance terminated to ground, they do not provide the required termination bias voltage. When this equip-
ment is directly connected to the SERDES output, it will provide an incorrect DC bias and prevents proper output
buffer operation.
Inserting the bias tee module in the SERDES output connection to the oscilloscope allows the application of the
required dc bias condition and provides the dc voltage translation going into the scope. This allows the oscilloscope
to display the SERDES output waveform/eye diagram under the proper termination bias conditions.
Q: What is the proper bias tee setup for Lattice High-Speed SERDES Boards?
The connections are shown below:
The bias tees may be placed anywhere in the signal path. Delay matched cables should be used insure proper P to
N signal timing at the oscilloscope.
High Speed
Oscilloscope
with 50
Ω
Inputs
Evaluation
Board SERDES
Tx Output
Bias
Tee
Bias
Tee
Bias
Tee
External
Power
Supply
DC Biased
Port
AC
Unbiased
Port
AC
Biased
Port
50
50
Note: The symbol above indicates a region where shielded (SMA) cable should be used.
