www.latticesemi.com
1
tn1134_01.2
June 2007
Technical Note TN1134
© 2007 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
Introduction
The Lattice 7:1 LVDS Video Demo Kit is a set of boards intended to bring RGB video data into the LatticeECP2™
FPGA where it can be processed and transmitted to an output display. It is intended to be used as a reference
design and to demonstrate the capabilities of the LatticeECP2 FPGA in video processing applications.
The complete kit consists of up to five boards. The heart of the kit is the LatticeECP2 Advanced Evaluation Board,
featuring a LatticeECP2-50 FPGA device. The kit is optionally available without this board.
The other four boards feature the required I/O interfaces to complete the demonstration. These are described in
more detail below.
About This Guide
This document includes descriptions of the design of the boards, the design of the IP for the LatticeECP2™ FPGA,
the items required to run the demonstration, and how to connect the boards and the cables for the demo.
Additional Resources
Additional resources related to the Lattice 7:1 LVDS Video Demo Kit, including updated documentation, HDL
source and bitstream programming files for the LatticeECP2 FPGA, a user’s guide for the LatticeECP2 Advanced
Evaluation Board, and other related materials can be downloaded from the Lattice web site at: www.lattices-
emi.com/boards. Navigate to the page for the Lattice 7:1 LVDS Video Demo Kit, and see the “documents and
downloads” link on the left side of the page.
7:1 Video Demonstration Setup and Design
Figure 1 is an overview of the connection between the boards, the required cables, and a block diagram of the
demo design implemented in LatticeECP2-50. The video signals are color-coded to indicate the different I/O stan-
dards including TMDS (pink), LVCMOS/LVTTL (orange), and LVDS (yellow).
Figure 1. Block Diagram of the Lattice 7:1 LVDS Video Demo Kit Setup
V
H
D
M
V
H
D
M
Gain
Control
Gain
Control
Gain
Control
RGB to YC
b
Cr Con
v
erter
Contrast / Brightness / H
u
e /
Sat
u
ration Adj
u
stments
L
V
DS 7:1 Rx
Deserializer
L
V
DS 7:1 Tx
Serializer
YC
b
Cr to RGB Con
v
erter
Y
C
b
Cr
Y
C
b
Cr
R
G
B
R
G
B
Board #3
2
6
-p
in
3
M
M
D
R
D
S
9
0
C
R
2
8
7
M
T
D
V
H
D
M
TMDS
Recei
v
er
(TI TFP401A )
Board #2
D
V
I
V
H
D
M
TMDS
Dri
v
er
(TI TFP410)
2
6
-p
in
3
M
M
D
R
D
S
9
0
C
R
2
8
8
A
M
T
D
60-pin
connection
Board #1 (or #4)
V
H
D
M
2
6
-p
in
3
M
M
D
R
Desktop PC
D
V
D Player
ATSC T
u
ner
D
V
D
Board #1
V
H
D
M
26
-p
in
3
M
M
D
R
LCD Display
LatticeECP2 Ad
v
anced E
v
al
u
ation Board
O
n
-B
o
a
rd
S
w
it
c
h
s
V
id
e
o
A
d
j
u
s
tm
e
n
ts
LatticeECP2-50 De
v
ice
MDR-26 Channel-Link Ca
b
le
D
V
I Ca
b
le
D
V
I Ca
b
le
OSD
MDR-26 Channel-Link Ca
b
le
60-pin
connection
D
V
I
TMDS signals
L
V
CMOS/L
V
TTL signals
L
V
DS signals
R
G
B
R
G
B
Lattice 7:1 LVDS Video Demo Kit
User’s Guide
